Data repair accelerating scheme for erasure-coded storage system based on FPGA and hierarchical parallel decoding structure
J Chen, S Yang, Y Wang, M Ye, F Lei - Cluster Computing, 2024 - Springer
Erasure coding has been widely used in commodity datacenter to tolerate faults, due to its
ability to simultaneously provide high storage space utilization and data reliability. However …
ability to simultaneously provide high storage space utilization and data reliability. However …
Efficient protection of polar decoders against Single Event Upsets (SEUs) on user memories
Polar codes are used in 5G systems for the transmission of control channels due to their
excellent error correction capability for short sequences. CRC aided successive cancellation …
excellent error correction capability for short sequences. CRC aided successive cancellation …
Reliability Evaluation and Fault Tolerance Design for FPGA Implemented Reed Solomon (RS) Erasure Decoders
Reed–Solomon erasure codes (RS-ECs) are widely applied in storage and packet
communication systems to recover erasures. When implemented on a field-programmable …
communication systems to recover erasures. When implemented on a field-programmable …
Symmetrical Data Recovery: FPGA-Based Multi-Dimensional Elastic Recovery Acceleration for Multiple Block Failures in Ceph Systems
F Lei, Y Wang, J Chen, S Yang - Symmetry, 2024 - mdpi.com
In the realm of Ceph distributed storage systems, ensuring swift and symmetrical data
recovery during severe data corruption scenarios is pivotal for data reliability and system …
recovery during severe data corruption scenarios is pivotal for data reliability and system …
Diagnosis of Analog and Digital Circuit Faults Using Exponential Deep Learning Neural Network
RS Ram, MLC Prabhaker - Journal of Electronic Testing, 2023 - Springer
With advanced technology, the latest Very Large Scale Integration (VLSI) circuit designs are
manufactured. In advanced technology-centered circuits, new design-specific, as well as …
manufactured. In advanced technology-centered circuits, new design-specific, as well as …
Efficient Protection of FPGA Implemented LDPC Decoders Against Single Event Upsets (SEUs) on Configuration Memories
Low Density Parity Check (LDPC) codes are used in 5G systems for traffic channels due to
their excellent error correction capability for long sequences, and the Min-Sum algorithm is …
their excellent error correction capability for long sequences, and the Min-Sum algorithm is …
Analysis and Evaluation of the Effects of Single Event Upsets (SEU s) on Memories in Polar Decoders
Z Gao, R Wang, H Du… - 2021 IEEE International …, 2021 - ieeexplore.ieee.org
Polar codes are used in 5G system for the transmission of control channels due to its
excellent error correction capability for short sequence, and CRC assistant successive …
excellent error correction capability for short sequence, and CRC assistant successive …
TOWARDS DIGITAL TWINS FOR OPTIMIZING METRICS IN DISTRIBUTED STORAGE SYSTEMS-A REVIEW
With the exponential data growth, there is a crucial need for highly available, scalable,
reliable, and cost-effective Distributed Storage Systems (DSSs). To ensure such efficient and …
reliable, and cost-effective Distributed Storage Systems (DSSs). To ensure such efficient and …
Técnicas de códigos de borrado aplicadas a almacenamiento distribuido
FR Marcillo Vera - 2023 - digibug.ugr.es
Los sistemas de almacenamiento distribuido tienen sus origenes en los sistemas de
almacenamiento centralizado, que eran utilizados para almacenar grandes cantidades de …
almacenamiento centralizado, que eran utilizados para almacenar grandes cantidades de …
A Simplified Design of Fast Error Correction Module Using Reed-Solomon Code
A Forward Error Correction (FEC) module realized in hardware on Field Programmable Gate
Array (FPGA) is having more significance in the practical control applications. This is due to …
Array (FPGA) is having more significance in the practical control applications. This is due to …