Modern processors share the last-level cache between all the cores to efficiently utilize the
cache space. Unfortunately, such sharing makes the cache vulnerable to attacks whereby …

We introduce a differentiable, end-to-end trainable framework for solving pixel-level
grou** problems such as instance segmentation consisting of two novel components …

FPGAs have been used in many applications to achieve orders-of-magnitude improvement
in absolute performance and energy efficiency relative to conventional microprocessors …

Transactional Memory (TM) systems must track the read and write sets--items read and
written during a transaction--to detect conflicts among concurrent trans-actions. Several TMs …

Caches often suffer from performance cliffs: minor changes in program behavior or available
cache space cause large changes in miss rate. Cliffs hurt performance and complicate …

As the design process of a building or infrastructure is complex with iterative steps and
multidisciplinary collaboration, design changes are inevitable and efficient change detection …

This paper makes a case for a new cross-layer interface, Expressive Memory (XMem), to
communicate higher-level program semantics from the application to the system software …

Meta-graph is currently the most powerful tool for similarity search on heterogeneous
information networks, where a meta-graph is a composition of meta-paths that captures the …

Hybrid memory cube (HMC) has promised to improve bandwidth, power consumption, and
density for the next-generation main memory systems. In addition, 3-D integration gives a …

Hardware signatures have been recently proposed as an efficient mechanism to detect
conflicts amongst concurrently running transactions in transactional memory systems (eg …