Novel optimum parity-preserving reversible multiplier circuits

E PourAliAkbar, K Navi, M Haghparast… - Circuits, Systems, and …, 2020 - Springer
Reversible logic is considered as a basic requirement for designing quantum computers.
Reversible circuits do not waste energy. The use of this logic in low-power complementary …

Design of parity preserving arithmetic and logic unit using reversible logic gates

S Pahuja, G Kaur - 2021 International Conference on Intelligent …, 2021 - ieeexplore.ieee.org
Arithmetic and Logical Unit (ALU) is one of the key aspects of the digital world. In generally,
it requires a colossal amount of power. This paper outlines a new design of one-bit Parity …

[PDF][PDF] Сбоеустойчивые обратимые схемы и метод их синтеза в пространстве Хемминга

ГВ Кормаков, СИ Гуров - … и информатика: труды факультета ВМК МГУ …, 2018 - cs.msu.ru
На сегодняшний день стал уже очевиден кризис классических информационных
технологий на элементной базе интегральных микросхем (ИМС), которые перестают …

Reversible logic multipliers: novel low-cost parity-preserving designs

F Eslami-Chalandar, M Valinataj, H Jazayeri - International Journal of …, 2019 - ije.ir
Reversible logic is one of the new paradigms for power optimization that can be used
instead of the current circuits. Moreover, the fault-tolerance capability in the form of error …

Designing parity preserving reversible circuits

G Paul, A Chattopadhyay, C Chandak - … , RC 2017, Kolkata, India, July 6-7 …, 2017 - Springer
With the emergence of reversible circuits as an energy-efficient alternative of classical
circuits, ensuring fault tolerance in such circuits becomes a very important problem. Parity …

[PDF][PDF] A novel reversible fault tolerant microprocessor design IN ams 0.35 UM process

MH Cılasun, M Altun - IU-Journal of Electrical & Electronics …, 2017 - dergipark.org.tr
In this study, reversible circuits are revisited to achieve extreme soft-defect awareness in
classical CMOS circuits. Defect models in the literature are reviewed and defect scattering is …

A Novel Fault Self-Detectable Universal Quantum Reversible Circuits Array Design

P Wu, R Wei, K Elleithy - 2018 9th IEEE Annual Ubiquitous …, 2018 - ieeexplore.ieee.org
Many classic logic gates are irreversible, such as" And gate", or" Or gate". This irreversibility
of the calculation results in energy consumption. Reversible circuit technology, like quantum …

[PDF][PDF] Fault-Tolerant Reversible Circuits and a Reversible Synthesis Method in a Hamming Space

GV Kormakov, SI Gurov - Computational Mathematics and …, 2018 - researchgate.net
The classical information technologies that rely on integrated microcircuit (IMC) elements
appear to have exhausted their potential. They no longer meet the growing demands for …

[BOOK][B] Synthesis, testing and tolerance in reversible logic

AM Nashiry - 2018 - search.proquest.com
In recent years, reversible computing has established itself as a promising research area
and emerging technology. This thesis focuses on three important areas of reversible logic …

[PDF][PDF] Fault Tolerant Parity Preserving Reversible Logic

M Poornima, MS Suma - 2018 - researchgate.net
Reversible logic is the promising design methodology for the future quantum circuits. Since
there is no loss in information in reversible circuits, it can be used to create the low power …