Efficient O-type map** and routing of large-scale neural networks to torus-based ONoCs

Q Yao, D Meng, H Yang, N Feng… - Journal of Optical …, 2024 - ieeexplore.ieee.org
The rapid development of artificial intelligence has accelerated the arrival of the era of large
models. Artificial-neural-network-based large models typically have millions to billions of …

[HTML][HTML] Performance and energy evaluation of dynamic adaptive deterministic routing algorithm for multicore architectures

A Lit, MH Husin, S Suhaili - e-Prime-Advances in Electrical Engineering …, 2024 - Elsevier
Abstract Chip Multiprocessors (CMPs) leverage multiple processing units to improve
computational speed and efficiency. Routing algorithms in NoC (Network-on-Chip) …

Exploring distance-based wireless transceiver placements for wireless network-on-chip architecture with deterministic routing algorithms.

A Lit, S Suhaili, K Kipli, R Sapawi… - International Journal of …, 2024 - search.ebscohost.com
Abstract Network-on-chip (NoC) technology is crucial for integrating multiple embedded
computing cores onto a single chip. Consequently, this has led to the development of the …

Attack and anomaly prediction in networks-on-chip of multiprocessor system-on-chip-based IoT utilizing machine learning approaches

MS Hathal, BM Saeed, DA Abdulqader… - … Oriented Computing and …, 2024 - Springer
The proliferation of multiprocessor system-on-chip (MPSoC) architectures within the Internet
of Things (IoT) has introduced notable security challenges. These architectures' distributed …

Performance Analysis of NoC and WiNoC in Multicore System Architectures

A Lit, S Suhaili, K Kipli, N Rajaee - International Journal of Networked and …, 2025 - Springer
Wireless network-on-chip has emerged as an innovative and effective solution to meet the
growing demands for efficient data communication in multi-core processors. It offers an …

DESIGN OF MINIATURE VAPOUR COMPRESSION REFRIGERATION SYSTEM FOR ELECTRONICS COOLING

P Koul, P Bhat, A Mishra, C Malhotra… - International Journal of …, 2024 - ijmrast.com
There is an increase in power consumption and thermal dissipation as the number of
transistors in a semiconductor device increase. As chip power increases, existing passive …

Performance and Energy Evaluation of Dynamic Adaptive Deterministic Routing for Multicore Architectures

A Lit, M Huja Husin, S Suhaili - Shamsiah, Performance and Energy … - papers.ssrn.com
Abstract Chip Multiprocessors (CMPs) leverage multiple processing units to improve
computational speed and efficiency. Routing algorithms in NoC (Network-on-Chip) …