Low power circuit design has been one of the major growing concerns in integrated circuit
technology. Reversible circuit (RC) design is a promising future domain in computing which …

This paper presents a proof-of-concept application of an approach to system development
based on the integration of formal verification and co-simulation. A simple autonomous …

Simulating organizational processes characterized by interacting human activities,
resources, business rules and constraints, is a challenging task, because of the inherent …

In this paper a simulator of soft errors (SEUs) in the configuration memory of SRAM-based
FPGAs is presented. The simulator, named ASSESS, adopts fault models for SEUs affecting …

In this paper, the Test Pattern Generation (TPG) with a new simple hybrid (dynamic and
static) compaction technique for combinational logic circuits and systems is presented …

The advancement in technologies has been increasing with increase in integrating scales
which allows fabricating millions of transistors on a chip. This demands the efficient testing …

This paper presents UA 2 TPG, a static analysis tool for the untestability proof and automatic
test pattern generation for SEUs in the configuration memory of SRAM-based FPGA …

Millions of people living with epilepsy in the world and most of them are from develo**
countries. Epilepsy occurs due to epileptic seizures and mainly observed in children and …

Testing of FPGA-based designs persists to be a challenging task because of the complex
FPGA architecture with heterogeneous components, and therefore a complicated fault …

In the Ph. D. thesis1 from which this summary has been extracted the author proposed a
framework of methodologies for the analysis and test of the effects of Single Event Upsets …