A customized graph neural network model for guiding analog IC placement

Y Li, Y Lin, M Madhusudan, A Sharma, W Xu… - Proceedings of the 39th …, 2020 - dl.acm.org
Analog IC placement is typically a manual process that requires strong experience and trial-
and-error iterations as it produces a large impact to circuit performance in a complicated …

Challenges and opportunities toward fully automated analog layout design

H Chen, M Liu, X Tang, K Zhu, N Sun… - Journal of …, 2020 - iopscience.iop.org
Realizing the layouts of analog/mixed-signal (AMS) integrated circuits (ICs) is a complicated
task due to the high design flexibility and sensitive circuit performance. Compared with the …

Performance-driven analog layout automation: Current status and future directions

P Xu, J Li, TY Ho, B Yu, K Zhu - 2024 29th Asia and South …, 2024 - ieeexplore.ieee.org
Optimizing circuit performance presents a pivotal challenge in the realm of automatic analog
physical design. The intricacy of analog performance arises from its sensitivity to layout …

MAGICAL: Toward fully automated analog IC layout leveraging human and machine intelligence

B Xu, K Zhu, M Liu, Y Lin, S Li, X Tang… - 2019 IEEE/ACM …, 2019 - ieeexplore.ieee.org
Despite tremendous advancement of digital IC design automation tools over the last few
decades, analog IC layout is still heavily manual which is very tedious and error-prone. This …

GeniusRoute: A new analog routing paradigm using generative neural network guidance

K Zhu, M Liu, Y Lin, B Xu, S Li, X Tang… - 2019 IEEE/ACM …, 2019 - ieeexplore.ieee.org
Due to sensitive layout-dependent effects and varied performance metrics, analog routing
automation for performance-driven layout synthesis is difficult to generalize. Existing …

Effective analog/mixed-signal circuit placement considering system signal flow

K Zhu, H Chen, M Liu, X Tang, N Sun… - Proceedings of the 39th …, 2020 - dl.acm.org
Placement is among the most critical steps in analog/mixed-signal (AMS) circuit layout
synthesis. It implicitly determines the wiring topology and therefore has considerable …

Exploring a machine learning approach to performance driven analog IC placement

Y Li, Y Lin, M Madhusudan, A Sharma… - 2020 IEEE computer …, 2020 - ieeexplore.ieee.org
Analog IC layout is usually a time-consuming manual design process. Although automated
analog IC layout has been studied for decades, most of the previous works are focused on …

LAYGO2: A custom layout generation engine based on dynamic templates and grids for advanced CMOS technologies

T Shin, D Lee, D Kim, G Sung, W Shin… - … on Computer-Aided …, 2023 - ieeexplore.ieee.org
This article presents an automatic layout generation framework in advanced CMOS
technologies. The framework extends the template-and-grid-based layout generation …

LayoutCopilot: An LLM-powered Multi-agent Collaborative Framework for Interactive Analog Layout Design

B Liu, H Zhang, X Gao, Z Kong, X Tang… - … on Computer-Aided …, 2025 - ieeexplore.ieee.org
Analog layout design heavily involves interactive processes between humans and design
tools. Electronic Design Automation (EDA) tools for this task are usually designed to use …

Are analytical techniques worthwhile for analog IC placement?

Y Lin, Y Li, D Fang, M Madhusudan… - … , Automation & Test …, 2022 - ieeexplore.ieee.org
Analytical techniques have long been a prevailing approach to digital IC placement due to
their advantage in handling large-sized problems. Recently, they have been adopted for …