Hardware multithreading is becoming a generally applied technique in the next generation
of microprocessors. Several multithreaded processors are announced by industry or already …

The instruction-level parallelism found in a conventional instruction stream is limited. Studies
have shown the limits of processor utilization even for today's superscalar microprocessors …

Silicon technology will continue to provide an exponential increase in the availability of raw
transistors. Effectively translating this resource into application performance, however, is an …

Simultaneous multithreading architectures have been defined previously with fully shared
execution resources. When one thread in such an architecture experiences a very long …

Despite the success of instruction-level parallelism (ILP) optimizations in increasing the
performance of microprocessors, certain codes remain elusive. In particular, codes …

This paper presents PPA (Persistent Processor Architecture), simple microarchitectural
support for lightweight yet performant whole-system persistence. PPA offers fully transparent …

We analyze an Intel Pentium 4 hyper-threading processor. The focus is to understand its
performance and the underlying reasons behind that performance. Particular attention is …

Efficient fine-grain synchronization is extremely important to effectively harness the
computational power of many-core architectures. However, designing and implementing …

Pre-execution techniques have received much attention as an effective way of prefetching
cache blocks to tolerate the ever-increasing memory latency. A number of pre-execution …

We examine the ability of CMPs, due to their lower on-chip communication latencies, to
exploit data parallelism at inner-loop granularities similar to that commonly targeted by …