Method of matching image features with reference features and integrated circuit therefor
N Stoeffler, P Meier - US Patent 9,378,431, 2016 - Google Patents
The invention is related to a method of matching image features with reference features,
comprising the steps of providing a current image captured by a capturing device, providing …
comprising the steps of providing a current image captured by a capturing device, providing …
Edge computing-based SAT-video coding for remote sensing
TA Bui, PJ Lee, KY Chen, CR Chen, CSJ Liu… - IEEE …, 2022 - ieeexplore.ieee.org
This paper proposes an edge computing-based video coding implementation on an Earth
observation satellite (SAT-video coding), which can encode video using limited resources …
observation satellite (SAT-video coding), which can encode video using limited resources …
High speed SAD architectures for variable block size motion estimation in HEVC video coding
HEVC is the latest video coding standard aimed to compress double to that of its
predecessor standard H. 264/AVC at the cost of increased coding complexity. Motion …
predecessor standard H. 264/AVC at the cost of increased coding complexity. Motion …
Registration of range and color images using gradient constraints and range intensity images
This paper proposes a method for the registration of range and color (or intensity) images,
based on the range intensity image that is simultaneously acquired with a range image. The …
based on the range intensity image that is simultaneously acquired with a range image. The …
A novel SAD architecture for variable block size motion estimation in HEVC video coding
Motion estimation (ME) is one of the critical and most time consuming tasks in video coding.
The increase of block size to 64x64 and introduction of asymmetric motion partitioning …
The increase of block size to 64x64 and introduction of asymmetric motion partitioning …
Real-time motion estimation diamond search algorithm for the new high efficiency video coding on FPGA
High efficiency video coding (HEVC) is the latest video coding standard aimed to replace the
H. 264/AVC standard according to its high coding performance, which allows it to be mostly …
H. 264/AVC standard according to its high coding performance, which allows it to be mostly …
Sum of absolute difference implementations for image processing on FPGAs
H Niitsuma, T Maruyama - 2010 International Conference on …, 2010 - ieeexplore.ieee.org
SAD (sum of absolute differences) is a technique for evaluating the similarity between two
same size regions, and widely used in stereovision, optical flow, motion estimation and so …
same size regions, and widely used in stereovision, optical flow, motion estimation and so …
High speed SAD architecture for variable block size motion estimation in HEVC encoder
VN Dinh, HA Phuong, DV Duc, PTK Ha… - 2016 IEEE Sixth …, 2016 - ieeexplore.ieee.org
Motion Estimation (ME) is the most time-consuming process in High Efficient Video Coding
(HEVC) encoder. The calculation of Sum of Absolute Difference (SAD) between current …
(HEVC) encoder. The calculation of Sum of Absolute Difference (SAD) between current …
A hardware-oriented concurrent TZ search algorithm for High-Efficiency Video Coding
Abstract High-Efficiency Video Coding (HEVC) is the latest video coding standard, in which
the compression performance is double that of its predecessor, the H. 264/AVC standard …
the compression performance is double that of its predecessor, the H. 264/AVC standard …
VLSI architecture of high speed SAD for high efficiency video coding (HEVC) encoder
This paper presents the architecture of integer motion estimation for HEVC encoder. Our
proposed architecture uses pipelined design with parallel processing to increase the …
proposed architecture uses pipelined design with parallel processing to increase the …