This paper gives an overview of state-of-the-art regarding the network-on-chip (NoC)
proposals. NoC paradigm replaces dedicated, design-specific wires with scalable, general …

Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip:
The Next Generation of System-on-Chip Integration examines the current issues restricting …

In complex embedded applications, optimisation and adaptation of both dynamic and
leakage power have become an issue at SoC grain. A fully power-aware globally …

A 16× 16 mesh network-on-chip (NoC) is fabricated in 22 nm tri-gate CMOS for high-
throughput, energy-efficient on-chip interconnect in multi-core processors and systems-on …

A MIMO 3GPP-LTE digital baseband chip based on a heterogeneous 3× 5 array NoC using
3.2 GOPS/50 mW programmable VLIW cores is presented. It features less than 10¿ s run …

Asynchronous networks-on-chip (NoCs) are an appealing solution to tackle the
synchronization challenge in modern multicore systems through the implementation of a …

A new asynchronous interconnection network is introduced for globally-asynchronous
locally-synchronous (GALS) chip multiprocessors. The network eliminates the need for …

Consider a coloring of the n-dimensional Boolean cube with c= 2" I colors in such a way that
every k-dimensional subcube is equicolored, ie each color occurs the same number of …

In many-core architectures different distributed applications are executed in parallel. The
applications may need hard guarantees for communication with respect to latency and …

Networks on Chip are the most promising approach to cope with communication
requirements in future many core SoCs. Depending on the executed applications …