Spin-transfer torque random access memory (STT-RAM), as a promising nonvolatile
memory technology, faces challenges of high write energy and low density. The recently …

SRAM yield analysis is critical to the robust SRAM design. However, it is a quite difficult to
estimate the SRAM yield because the circuit failure is a “rare-event”. Existing methods are …

The utilization of Bayesian methods has been widely acknowledged as a viable solution for
tackling various challenges in electronic integrated circuit (IC) design under stochastic …

Performance failure has become a growing concern for the robustness and reliability of
memory circuits. It is challenging to accurately estimate the extremely small failure …

Statistical circuit simulation is exhibiting increasing importance for circuit design under
process variations. Existing approaches cannot efficiently analyze the failure probability for …

Statistical circuit simulation is exhibiting increasing importance for circuit design under
process variations. It has been widely used throughout the design of standard cell circuits …

With scaling technology, emerging nonvolatile devices, and data-intensive applications,
memory faults have become a major reliability concern for computing systems. With various …

Performance failure has become a major threat for various memory and analog circuits. It is
challenging to estimate the extremely small failure probability when failed samples are …

“Curse of dimensionality” has become the major challenge for existing high-sigma yield
analysis methods. In this article, we develop a meta-model using Low-Rank Tensor …

Traditional Static Random-Access Memory (SRAM) yield estimation through Monte Carlo
analysis is an extremely time-consuming process since it runs millions of expensive …