A fast FPGA-based BCD adder

M Ul Haque, ZT Sworna, HM Hasan Babu… - Circuits, Systems, and …, 2018 - Springer
The binary-coded decimal (BCD) being the more accurate and human-readable
representation with ease of conversion is prevailing in the computing and electronic …

High-speed and area-efficient LUT-based BCD multiplier design

ZT Sworna, MUI Haque… - 2018 IEEE International …, 2018 - ieeexplore.ieee.org
For scientific, research, business and financial purpose multiplication is the rudimentary
mathematical operation. Besides, BCD (Binary Coded Decimal) representation is prevailing …

An Efficient Design of an FPGA-Based Multiplier Using LUT Merging Theorem

ZT Sworna, MU Haque, HMH Babu… - 2017 IEEE Computer …, 2017 - ieeexplore.ieee.org
FPGA (Field Programmable gate array) technology has become an integral part of todays
modern embedded systems. All mainstream commercial FPGA devices are based upon LUT …

[BOOK][B] VLSI circuits and embedded systems

HMH Babu - 2022 - taylorfrancis.com
Very Large-Scale Integration (VLSI) creates an integrated circuit (IC) by combining
thousands of transistors into a single chip. While designing a circuit, reduction of power …

2dam-wave: An evaluation method for the wave capability model

RA Glanzner, JLN Audy - 2012 IEEE Seventh International …, 2012 - ieeexplore.ieee.org
The purpose of this paper is to present the 2DAM-WAVE, an evaluation method that enables
organizations to assess their capability in global software development and to discover …

A cost-efficient look-up table based binary coded decimal adder design

ZT Sworna, MU Haque, HMH Babu, L Jamal - arxiv preprint arxiv …, 2022 - arxiv.org
The BCD (Binary Coded Decimal) being the more accurate and human-readable
representation with ease of conversion, is prevailing in the computing and electronic …