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Improving size and efficiency of dies
MJ Manusharow, J Rosenfeld - US Patent 10,886,228, 2021 - Google Patents
An integrated circuit package is disclosed. The integrated circuit package includes a first
integrated circuit die, a second integrated circuit die, an organic substrate, wherein both the …
integrated circuit die, a second integrated circuit die, an organic substrate, wherein both the …
Multi-chip packages with multi-fan-out scheme and methods of manufacturing the same
HW Chen, J Chen - US Patent 10,269,767, 2019 - Google Patents
ABSTRACT A package may include a first chip having a first surface and a second surface
opposite the first surface; a first redistri bution line (RDL) coupled to the first surface of the …
opposite the first surface; a first redistri bution line (RDL) coupled to the first surface of the …
Matching circuit for integrated circuit die
JC Mahon, PJ Katzin, S Lin - US Patent 11,424,196, 2022 - Google Patents
An integrated circuit (IC) die is disclosed. The IC die can include a signal via extending
through the IC die. The IC die can include a transmission line extending laterally within the …
through the IC die. The IC die can include a transmission line extending laterally within the …
Cavity packages
2023-05-19 Assigned to BANK OF AMERICA, NA, AS COLLATERAL AGENT reassignment
BANK OF AMERICA, NA, AS COLLATERAL AGENT SECURITY INTEREST (SEE …
BANK OF AMERICA, NA, AS COLLATERAL AGENT SECURITY INTEREST (SEE …
Electronics package devices with through-substrate-vias having pitches independent of substrate thickness
B Khalaf, JG Meyers - US Patent App. 15/640,279, 2019 - Google Patents
H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid
state devices; Multistep manufacturing processes thereof all the devices being of a type …
state devices; Multistep manufacturing processes thereof all the devices being of a type …
Package structure, fan-out package structure and method of the same
CL Hwang, HH Liao, YT Chiu - US Patent 10,269,582, 2019 - Google Patents
US10269582B2 - Package structure, fan-out package structure and method of the same -
Google Patents US10269582B2 - Package structure, fan-out package structure and method of …
Google Patents US10269582B2 - Package structure, fan-out package structure and method of …
Transition circuitry for integrated circuit die
S Lin - US Patent 11,417,615, 2022 - Google Patents
An integrated circuit (IC) die having a first side and a second side opposite the first side is
disclosed. The IC die can include a signal via through the IC die. The IC die can include …
disclosed. The IC die can include a signal via through the IC die. The IC die can include …
Bonded structures
L Wang, R Katkar, JA Delacruz, AR Sitaram - US Patent 11,670,615, 2023 - Google Patents
2023-05-03 Assigned to BANK OF AMERICA, NA, AS COLLATERAL AGENT reassignment
BANK OF AMERICA, NA, AS COLLATERAL AGENT SECURITY INTEREST (SEE …
BANK OF AMERICA, NA, AS COLLATERAL AGENT SECURITY INTEREST (SEE …
Integrated circuit chip design for symmetric power delivery
VR Calugaru - US Patent 11,004,783, 2021 - Google Patents
An integrated circuit (IC) chip design for symmetric power delivery includes an integrated
circuit (IC) chip package with I/O connections exposed on a first surface and power …
circuit (IC) chip package with I/O connections exposed on a first surface and power …
Methods of forming semiconductor packages having a die with an encapsulant
CH Tsai, CC Lin, KC Wu, CT Wang, CH Yu - US Patent 11,315,891, 2022 - Google Patents
(Continued) Primary Examiner Khiem D Nguyen (74) Attorney, Agent, or Firm Slater Matsil,
LLP (57) ABSTRACT An embodiment is a device including an integrated circuit die having …
LLP (57) ABSTRACT An embodiment is a device including an integrated circuit die having …