Llms and the future of chip design: Unveiling security risks and building trust
Z Wang, L Alrahis, L Mankali, J Knechtel… - 2024 IEEE Computer …, 2024 - ieeexplore.ieee.org
Chip design is about to be revolutionized by the integration of large language, multimodal,
and circuit models (collectively LxMs). While exploring this exciting frontier with tremendous …
and circuit models (collectively LxMs). While exploring this exciting frontier with tremendous …
Assertllm: Generating and evaluating hardware verification assertions from design specifications via multi-llms
Assertion-based verification (ABV) is a critical method for ensuring design circuits comply
with their architectural specifications, which are typically described in natural language. This …
with their architectural specifications, which are typically described in natural language. This …
[HTML][HTML] The potential of llms in hardware design
S Alsaqer, S Alajmi, I Ahmad, M Alfailakawi - Journal of Engineering …, 2024 - Elsevier
The unprecedented success of Large Language Models (LLMs) like ChatGPT across
diverse domains such as natural language understanding and coding has paved the way for …
diverse domains such as natural language understanding and coding has paved the way for …
Amsnet: Netlist dataset for ams circuits
Today's analog/mixed-signal (AMS) integrated circuit (IC) designs demand substantial
manual intervention. The advent of multimodal large language models (MLLMs) has …
manual intervention. The advent of multimodal large language models (MLLMs) has …
Comparative analysis of ChatGPT-4 and LLaMA: Performance evaluation on text summarization, data analysis, and question answering
SR Bogireddy, N Dasari - 2024 15th International Conference …, 2024 - ieeexplore.ieee.org
ChatGPT has demonstrated the strong performance of large language models (LLMs) in
natural language tasks since its November 2022 rollout by using vast datasets with trillions …
natural language tasks since its November 2022 rollout by using vast datasets with trillions …
RTLCoder: Fully open-source and efficient LLM-assisted RTL code generation technique
The automatic generation of RTL code (eg, Verilog) using natural language instructions and
large language models (LLMs) has attracted significant research interest recently. However …
large language models (LLMs) has attracted significant research interest recently. However …
LLM-enhanced Bayesian optimization for efficient analog layout constraint generation
Analog layout synthesis faces significant challenges due to its dependence on manual
processes, considerable time requirements, and performance instability. Current Bayesian …
processes, considerable time requirements, and performance instability. Current Bayesian …
AssertLLM: Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs
Assertion-based verification (ABV) is a critical method for ensuring design circuits comply
with their architectural specifications, which are typically described in natural language. This …
with their architectural specifications, which are typically described in natural language. This …
Assessing Economic Viability: A Comparative Analysis of Total Cost of Ownership for Domain-Adapted Large Language Models versus State-of-the-art Counterparts …
This paper presents a comparative analysis of total cost of ownership (TCO) and
performance between domain-adapted large language models (LLM) and state-of-the-art …
performance between domain-adapted large language models (LLM) and state-of-the-art …
Self-HWDebug: Automation of LLM self-instructing for hardware security verification
The rise of instruction-tuned Large Language Models (LLMs) marks a significant
advancement in artificial intelligence (AI)(tailored to respond to specific prompts). Despite …
advancement in artificial intelligence (AI)(tailored to respond to specific prompts). Despite …