This book is the fourth in a series on novel low power design architectures, methods and
design practices. It results from of a large European project started in 1997, whose goal is to …

Estimating power dissipation in Very Large Scale Integrated (VLSI) circuits, particularly large-
scale sequential circuits, is a significant challenge in Electronic Design Automation (EDA) …

Switching activity estimation is an important aspect of power estimation at circuit level.
Switching activity in a node is temporally correlated with its previous value and is spatially …

An important issue in the design of VLSI circuits is the choice of the basic circuit approach
and topology for implementing various logic and arithmetic functions. In this paper, several …

In today's design of resilient embedded systems, logic circuit components play a key role.
Many possible design choices at the gate level, such as implementation architecture or …

We propose SyfriPow, a method for estimating the vectorless average power consumption of
gate-level circuits using sparse symbolic matrix inference. SyfriPow employs a probability …

In this paper, we investigate the estimation of switching activity in VLSI circuits using a
graphical probabilistic model based on cascaded Bayesian networks (CBNs). First, we …

We propose a new switching probability model for combinational circuits using a Logic-
Induced-Directed-Acyclic-Graph (LIDAG) and prove that such a graph corresponds to a …

Toggle rate estimation is critical in the area of chip design, as it plays a major role in the
power dissipation of a chip. This work presents a method to estimate the net toggle rate of a …

Dynamic power estimation is essential in designing VLSI circuits where many parameters
are involved but the only circuit parameter that is related to the circuit operation is the nodes' …