This paper revisits histogram method for ADC linearity test. Here two methods are proposed
for low cost test of histogram method. The first proposal is two-tone sine wave input for code …

This paper presents a comprehensive investigation of several important error sources for the
successive-approximation register (SAR) analog-to-digital converters (ADCs). The error …

This paper presents a digital nonlinearity calibration technique for ADCs with strong input-
output discontinuities between adjacent codes, such as pipeline, algorithmic, and SAR …

A transition-code based method is proposed to reduce the linearity testing time of pipelined
analog-to-digital converters (ADCs). By employing specific architecture-dependent rules …

Virtual instruments let the user define custom measurement approaches to cope with
specific goals. The use of virtual instruments also raises an important issue, which concerns …

This paper presents a novel Look-up Table (LUT) calibration technique for static non-
linearity compensation in analog-to-digital converters (ADCs) with digital redundancy, such …

In this work, a switched capacitor-based successive approximation register (SAR) analog-to-
digital converter (ADC) using a passive reference charge sharing and charge accumulation …

In the analog-to-digital converter (ADC) test process, the static and dynamic performance
parameters are the most important, and the tests for these parameters account for the bulk of …

This paper demonstrates the first fully integrated built-in self-test (BIST) Σ-Δ analog-to-digital
converter (ADC) chip to the best of our knowledge. The ADC under test (AUT) comprises a …

This paper reports design, efficiency, and measurement results of the process variation and
temperature monitors for yield analysis and enhancement in deep-submicron CMOS circuits …