Instructions having support for floating point and integer data types in the same register

E Ould-Ahmed-Vall, B Lakshmanan… - US Patent …, 2019 - Google Patents
One embodiment provides for a compute apparatus to per form machine learning
operations, the compute apparatus comprising instruction decode logic to decode a single …

Instructions and logic to perform floating-point and integer operations for machine learning

H Kaul, MA Anders, SK Mathew, A Yao, J Ray… - US Patent …, 2019 - Google Patents
US10353706B2 - Instructions and logic to perform floating-point and integer operations for
machine learning - Google Patents US10353706B2 - Instructions and logic to perform …

Instructions and logic to perform floating-point and integer operations for machine learning

H Kaul, MA Anders, SK Mathew, A Yao, J Ray… - US Patent …, 2019 - Google Patents
One embodiment provides for a machine-learning hardware accelerator comprising a
compute unit having an adder and a multiplier that are shared between integer data path …

Mixed inference using low and high precision

E Ould-Ahmed-Vall, B Lakshmanan… - US Patent …, 2022 - Google Patents
Mendonsa & Hamilton LLP (57) ABSTRACT One embodiment provides for a graphics
processing unit (GPU) to accelerate machine learning operations, the GPU comprising an …

Compute unit having independent data paths

E Ould-Ahmed-Vall, B Lakshmanan… - US Patent …, 2022 - Google Patents
One embodiment provides for a general-purpose graphics processing unit comprising a
streaming multiprocessor hav ing a single instruction, multiple thread (SIMT) architecture …

Instructions and logic to perform floating-point and integer operations for machine learning

H Kaul, MA Anders, SK Mathew, A Yao, J Ray… - US Patent …, 2021 - Google Patents
One embodiment provides for a graphics processing unit to accelerate machine learning
operations, the graphics pro cessing unit comprising a multiprocessor having a single …

Dot product operations on sparse matrix elements

A Appu, S Maiyuran, M MacPherson, F Fu… - US Patent …, 2023 - Google Patents
2020-12-16 Assigned to INTEL CORPORATION reassignment INTEL CORPORATION
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …

Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format

S Maiyuran, S Marwaha, A Garg, S Pal, J Parra… - US Patent …, 2022 - Google Patents
Described herein is a graphics processing unit (GPU) com prising a single instruction,
multiple thread (SIMT) multi processor comprising an instruction cache, a shared memory …

Instructions and logic to perform floating point and integer operations for machine learning

H Kaul, MA Anders, SK Mathew, A Yao, J Ray… - US Patent …, 2021 - Google Patents
US11080046B2 - Instructions and logic to perform floating point and integer operations for
machine learning - Google Patents US11080046B2 - Instructions and logic to perform …

Graphics processor operation scheduling for deterministic latency

J Ray, S Panneer, S Tangri, B Ashbaugh… - US Patent …, 2024 - Google Patents
Embodiments described herein include software, firmware, and hardware that provides
techniques to enable deterministic scheduling across multiple general-purpose graphics …