Deep-submicron CMOS designs have resulted in large leakage energy dissipation in
microprocessors. While SRAM cells in on-chip cache memories always contribute to this …

Set-associative caches achieve low miss rates for typical applications but result in significant
energy dissipation. Set-associative caches minimize access time by probing all the data …

Deep-submicron CMOS designs maintain high transistor switching speeds by scaling down
the supply voltage and proportionately, reducing the transistor threshold voltage. Lowering …

The power consumption of integrated circuits is one of the most problematic considerations
affecting the design of high-performance chips and portable devices. The study of power …

Abstract Program-counter-based (PC-based) prediction techniques have been shown to be
highly effective and are widely used in computer architecture design. In this paper, we …

With the scaling of technology and the need for higher performance and more functionality,
power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline …

Power dissipation and energy consumption became the primary design constraint for almost
all computer systems in the last 15 years. Both computer architects and circuit designers …

Deep-submicron CMOS designs maintain high transistor switching speeds by scaling down
the supply voltage and proportionately reducing the transistor threshold voltage. Lowering …

Since caches consume a significant fraction of total processor energy, eg, 43% for
StrongARM-1 [8], many studies have investigated energy-efficient cache designs [1, 5, 12 …

With the scaling of technology and the need for higher performance and more functionality,
power dissipation is becoming a major bottleneck for microprocessor designs. Because …