Recent issues in negative-bias temperature instability: Initial degradation, field dependence of interface trap generation, hole trap** effects, and relaxation

AE Islam, H Kufluoglu, D Varghese… - … on Electron Devices, 2007 - ieeexplore.ieee.org
Recent advances in experimental techniques (on-the-fly and ultrafast techniques) allow
measurement of threshold voltage degradation due to negative-bias temperature instability …

Charge retention of scaled SONOS nonvolatile memory devices at elevated temperatures

MH White - Solid-State Electronics, 2000 - Elsevier
The charge retention characteristics in scaled SONOS nonvolatile memory devices with an
effective gate oxide thickness of 94 Å and a tunnel oxide of 15 Å are investigated in a …

An analytical retention model for SONOS nonvolatile memory devices in the excess electron state

Y Wang, MH White - Solid-State Electronics, 2005 - Elsevier
We present an analytical retention model for scaled SONOS devices in the excess electron
state. In this model, trap-to-band tunneling and thermal excitation discharge mechanisms …

Transient conduction in multidielectric silicon–oxide–nitride–oxide semiconductor structures

H Bachhofer, H Reisinger, E Bertagnolli… - Journal of Applied …, 2001 - pubs.aip.org
The voltage-and time-dependence of the tunneling currents in polysilicon–oxide–nitride–
oxide semiconductor structures have been investigated. Electron and hole contributions …

On the physical mechanism of NBTI in silicon oxynitride p-MOSFETs: Can differences in insulator processing conditions resolve the interface trap generation versus …

S Mahapatra, K Ahmed, D Varghese… - 2007 IEEE …, 2007 - ieeexplore.ieee.org
Negative bias temperature instability (NBTI) is studied in plasma (PNO) and thermal (TNO)
Si-oxynitride devices having varying EOT. Threshold voltage shift (DeltaV T) and its field (E …

A low-voltage alterable EEPROM with metal—oxide-nitride—oxide—semiconductor (MONOS) structures

E Suzuki, H Hiraishi, K Ishii… - IEEE Transactions on …, 1983 - ieeexplore.ieee.org
Theoretical and experimental investigations to obtain lower voltage electrically erasable and
programmable ROM's (EEPROM's) than conventional devices have been performed. The …

Nonvolatile semiconductor memory devices

JJ Chang - Proceedings of the IEEE, 1976 - ieeexplore.ieee.org
An attempt is made to survey and assess the nonvolatile semiconductor memory devices
including charge-storage devices and FET's with ferroelectric gate insulators. The charge …

KMC simulation of the electroforming, set and reset processes in redox-based resistive switching devices

E Abbaspour, S Menzel, A Hardtdegen… - IEEE transactions on …, 2018 - ieeexplore.ieee.org
This paper presents a physical model to investigate the electroforming, set and reset
processes in Redox-based resistive switching RAM based on the valence change …

A comparison of very fast to very slow components in degradation and recovery due to NBTI and bulk hole trap** to existing physical models

H Reisinger, O Blank, W Heinrigs… - … on Device and …, 2007 - ieeexplore.ieee.org
A new measuring technique with a 1mus measuring delay and a direct VT determination has
been employed. The response to stress times as short as 100 mus to 10 5 has been studied …

Hole traps in silicon dioxide

MH Woods, R Williams - Journal of Applied Physics, 1976 - pubs.aip.org
We have measured the properties of holes trapped in an SiO2 layer by application of a large
electric field. The high field (1.4× 107 V/cm) was obtained by applying a negative corona …