A survey of microarchitectural side-channel vulnerabilities, attacks, and defenses in cryptography

X Lou, T Zhang, J Jiang, Y Zhang - ACM Computing Surveys (CSUR), 2021 - dl.acm.org
Side-channel attacks have become a severe threat to the confidentiality of computer
applications and systems. One popular type of such attacks is the microarchitectural attack …

Cyclone: Detecting contention-based cache information leaks through cyclic interference

A Harris, S Wei, P Sahu, P Kumar, T Austin… - Proceedings of the 52nd …, 2019 - dl.acm.org
Micro-architecture units like caches are notorious for leaking secrets across security
domains. An attacker program can contend for on-chip state or bandwidth and can even use …

Compact leakage-free support for integrity and reliability

M Taassori, R Balasubramonian… - 2020 ACM/IEEE 47th …, 2020 - ieeexplore.ieee.org
The memory system is vulnerable to a number of security breaches, eg, an attacker can
interfere with program execution by disrupting values stored in memory. Modern Intel® …

D-oram: Path-oram delegation for low execution interference on cloud servers with untrusted memory

R Wang, Y Zhang, J Yang - 2018 IEEE International …, 2018 - ieeexplore.ieee.org
Cloud computing has evolved into a promising computing paradigm. However, it remains a
challenging task to protect application privacy and, in particular, the memory access …

Shadow block: Accelerating oram accesses with data duplication

X Zhang, G Sun, P **e, C Zhang, Y Liu… - 2018 51st Annual …, 2018 - ieeexplore.ieee.org
Oblivious RAM (ORAM) is a cryptographic primitive designed to hide memory access
patterns. To achieve this objective, the intended data block is loaded and evicted back …

A strategic performance of virtual task scheduling in multi cloud environment

C Thirumalaiselvan, V Venkatachalam - Cluster Computing, 2019 - Springer
An emerging technology of cloud computing has major issue as scheduling the task and
resource allocating. To avoid this issue, there are suggestions on different scheduling …

Hypervisor-based virtual machine isolation apparatus and method

W Hwang, S Kim, B Kim, YI Hyunyi, C Lee… - US Patent …, 2020 - Google Patents
A hypervisor-based virtual machine isolation apparatus and method. The hypervisor-based
virtual machine isolation method performed by the hypervisor-based virtual machine …

Towards microarchitectural side-channel security for modern applications—a case for many-domain processors

S Wei - 2024 - repositories.lib.utexas.edu
Modern applications often host or process code and data from many mutually distrusted
entities referred to as security domains. Ensuring the data privacy and security of these …

An MLP-aware leakage-free memory controller

A Vuong, A Shafiee, M Taassori… - Proceedings of the 7th …, 2018 - dl.acm.org
Timing channels can be exploited to leak information between two virtual machines running
on a shared server. Indeed, cache timing channels are important components in the Spectre …

A Case for Maximal Leakage as a Side Channel Leakage Metric

B Wu, AB Wagner, GE Suh - arxiv preprint arxiv:2004.08035, 2020 - arxiv.org
Side channels represent a broad class of security vulnerabilities that have been
demonstrated to exist in many applications. Because completely eliminating side channels …