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A carbon nano-tube field effect transistor based stable, low-power 8T static random access memory cell with improved write access time
Carbon nanotube field effect transistor (CNTFET) is swiftly becoming an alternative to
conventional CMOS transistors due to superior transport properties, improved current …
conventional CMOS transistors due to superior transport properties, improved current …
A review on performance evaluation of different low power SRAM cells in nano-scale era
The growing demand of Internet of things based portable gadgets motivate to develop low
power static random access memory (SRAM) cell. It occupies large portion in modern …
power static random access memory (SRAM) cell. It occupies large portion in modern …
Single-ended Schmitt-trigger-based robust low-power SRAM cell
This paper presents a Schmitt-trigger-based single-ended 11T SRAM cell, which
significantly improves read and write static noise margin (SNM) and consumes low power …
significantly improves read and write static noise margin (SNM) and consumes low power …
A single-ended disturb-free 9T subthreshold SRAM with cross-point data-aware write word-line structure, negative bit-line, and adaptive read operation timing tracing
MH Tu, JY Lin, MC Tsai, CY Lu, YJ Lin… - IEEE Journal of Solid …, 2012 - ieeexplore.ieee.org
This paper presents a novel single-ended disturb-free 9T subthreshold SRAM cell with cross-
point data-aware Write word-line structure. The disturb-free feature facilitates bit-interleaving …
point data-aware Write word-line structure. The disturb-free feature facilitates bit-interleaving …
Variation tolerant differential 8T SRAM cell for ultralow power applications
Low power and noise tolerant static random access memory (SRAM) cells are in high
demand today. This paper presents a stable differential SRAM cell that consumes low …
demand today. This paper presents a stable differential SRAM cell that consumes low …
[CARTE][B] Robust SRAM designs and analysis
This book provides a guide to Static Random Access Memory (SRAM) bitcell design and
analysis to meet the nano-regime challenges for CMOS devices and emerging devices …
analysis to meet the nano-regime challenges for CMOS devices and emerging devices …
Leakage characterization of 10T SRAM cell
This paper presents a technique for designing a low-power and variability-aware SRAM cell.
The cell achieves low power dissipation due to its series-connected tail transistor and read …
The cell achieves low power dissipation due to its series-connected tail transistor and read …
A 130 mV SRAM with expanded write and read margins for subthreshold applications
MF Chang, SW Chang, PW Chou… - IEEE Journal of Solid …, 2010 - ieeexplore.ieee.org
SRAM suffers read-disturb and write failures at a low supply voltage, especially at deep
subthreshold operation. This study proposes a 9T-SRAM cell with a data-aware-feedback …
subthreshold operation. This study proposes a 9T-SRAM cell with a data-aware-feedback …
9-T SRAM cell for reliable ultralow-power applications and solving multibit soft-error issue
Higher noise tolerance, lower power consumption, and higher reliability are the major
design metrics for designing an SRAM cell. It is difficult to achieve an SRAM cell with stable …
design metrics for designing an SRAM cell. It is difficult to achieve an SRAM cell with stable …
An improved read-assist energy efficient single ended PPN based 10T SRAM cell for wireless sensor network
In this paper, a novel single ended PPN based 10T static random access memory (SRAM)
with high read stability is presented. The proposed cell is energy efficient with double ended …
with high read stability is presented. The proposed cell is energy efficient with double ended …