Interconnect scaling has become a major design challenge for traditional planar (2D)
integrated circuits (ICs). Three-dimensional (3D) IC that stacks multiple device layers …

Abstract Network-on-chips (NoCs) have been widely employed in the design of
multiprocessor system-on-chips (MPSoCs) as a scalable communication solution. NoCs …

Many-core systems connected by 3D Networks-on-Chip (NoC) are emerging as a promising
computation engine for systems like cloud computing servers, big data systems, etc …

In the era of the billion transistors on a chip that are capable of implementing thousands of
processing cores, Network-on-Chips (NoCs) are the most viable and scalable solution to …

Many-core systems connected by 3D Network-on-Chips (NoC) are emerging as a promising
computation engine for systems like cloud computing servers, big data systems, etc …

In this paper, we propose a two-stage thermal-aware task scheduling policy which exploits
the application and system architecture characteristics to decouple the map** of task …

The industry trend of Chip Multiprocessors (CMPs) architecture is to move from 2D CMPs to
3D CMPs architecture which obtains higher performance, more reliability, reduced cache …

Abstract Three-dimensional Network-on-Chips (3D NoCs) is a popular design choice due to
its low packet latency, low network power consumption and high packing density. However …

Due to growing power density, on-chip temperature increases rapidly, which has hampered
the reliability and performance of modern real-time systems. This paper studies how to …

Abstract Application-Specific Network-on-Chip (ASNoC) has emerged as a more efficient
design alternative to the regular Network-on-Chip (NoC) topologies, which can better suit …