Two-phase low-energy N-modular redundancy for hard real-time multi-core systems

M Salehi, A Ejlali, BM Al-Hashimi - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
This paper proposes an N-modular redundancy (NMR) technique with low energy-overhead
for hard real-time multi-core systems. NMR is well-suited for multi-core platforms as they …

Clover: Compiler directed lightweight soft error resilience

Q Liu, C Jung, D Lee, D Tiwari - ACM Sigplan Notices, 2015 - dl.acm.org
This paper presents Clover, a compiler directed soft error detection and recovery scheme for
lightweight soft error resilience. The compiler carefully generates soft error tolerant code …

Low-cost soft error resilience with unified data verification and fine-grained recovery for acoustic sensor based detection

Q Liu, C Jung, D Lee, D Tiwarit - 2016 49th Annual IEEE/ACM …, 2016 - ieeexplore.ieee.org
This paper presents Turnstile, a hardware/software cooperative technique for low-cost soft
error resilience. Leveraging the recent advance of acoustic sensor based soft error …

Compiler-directed soft error detection and recovery to avoid DUE and SDC via Tail-DMR

Q Liu, C Jung, D Lee, D Tiwari - ACM Transactions on Embedded …, 2016 - dl.acm.org
This article presents Clover, a compiler-directed soft error detection and recovery scheme for
lightweight soft error resilience. The compiler carefully generates soft-error-tolerant code …

Empowering communities in the peri-urban areas of Colombo

R Dayaratne… - Environment and …, 2003 - journals.sagepub.com
This paper describes the work of community-based self-help groups, the community
development councils (CDCs), initiated by the Colombo Municipal Council in the late 1970s …

Variation-aware reliable many-core system design by exploiting inherent core redundancy

HT Li, CY Chou, YT Hsieh, WC Chu… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
Reliability issues are more severe in multi/many-core systems because of the integration of
more devices in advanced technology nodes. To achieve robust computing in nanoscale …

An energy-efficient directory based multicore architecture with wireless routers to minimize the communication latency

A Asaduzzaman, KK Chidella… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
Multicore architectures suffer from high core-to-core communication latency primarily due to
the cache's dynamic behavior. Studies suggest that a directory-approach can be helpful to …

Benchprime: Effective building of a hybrid benchmark suite

Q Liu, X Wu, L Kittinger, M Levy, C Jung - ACM Transactions on …, 2017 - dl.acm.org
This paper presents BenchPrime, an automated benchmark analysis toolset that is
systematic and extensible to analyze the similarity and diversity of benchmark suites …

Compiler-directed error resilience for reliable computing

Q Liu - 2018 - vtechworks.lib.vt.edu
Error resilience has become as important as power and performance in modern computing
architecture. There are various sources of errors that can paralyze real-world computing …

Energy optimization for large-scale 3D manycores in the dark-silicon era

S Majzoub, RA Saleh, I Ashraf, M Taouil… - IEEE …, 2019 - ieeexplore.ieee.org
In this paper, we study the impact of the idle/dynamic power consumption ratio on the
effectiveness of a multi-V dd/frequency manycore design. We propose a new tool called …