Mesoscale trumps nanoscale: metallic mesoscale contact morphology for improved light trap**, optical absorption and grid conductance in silicon solar cells

R Saive, HA Atwater - Optics express, 2018 - opg.optica.org
We report on a computational study exploring the design of mesoscale metallic front
contacts for solar cells. We investigated silver contact structures with circle, triangle and …

Nanowire transistor with source and drain induced by electrical contacts with negative Schottky barrier height

PA Clifton, A Goebel, WA Harrison - US Patent 10,170,627, 2019 - Google Patents
ABSTRACT A nanowire transistor includes undoped source and drain regions electrically
coupled with a channel region. A source stack that is electrically isolated from a gate …

Effect of realistic metal electronic structure on the lower limit of contact resistivity of epitaxial metal-semiconductor contacts

G Hegde, R Chris Bowen - Applied Physics Letters, 2014 - pubs.aip.org
The effect of realistic metal electronic structure on the lower limit of resistivity in [100]
oriented n-Si is investigated using full band Density Functional Theory and Semi-Empirical …

Performance and variability studies of InGaAs gate-all-around nanowire MOSFETs

N Conrad, SH Shin, J Gu, M Si, H Wu… - … on Device and …, 2013 - ieeexplore.ieee.org
Furthering Si CMOS scaling requires development of high-mobility channel materials and
advanced device structures to improve the electrostatic control. We demonstrate the …

Atomistic tight-binding study of contact resistivity in Si/SiGe PMOS schottky contacts

P Sarangapani, C Weber, J Chang… - IEEE Transactions …, 2018 - ieeexplore.ieee.org
The metal-semiconductor contact resistivity has started to play a critical role for the overall
device performance as Si is reaching 10-nm size ranges. The International Technology …

MIS contact structure with metal oxide conductor

PA Clifton, A Goebel - US Patent 10,147,798, 2018 - Google Patents
An electrical contact structure (an MIS contact) includes one or more conductors (M-Layer), a
semiconductor (S-Layer), and an interfacial dielectric layer (I-Layer) of less than 4 nm …

Nanowire transistor with source and drain induced by electrical contacts with negative Schottky barrier height

PA Clifton, A Goebel, WA Harrison - US Patent 10,833,199, 2020 - Google Patents
(57) ABSTRACT A nanowire transistor includes undoped source and drain regions
electrically coupled with a channel region. A source stack that is electrically isolated from a …

An investigation of transmission line modeling test structure in TCAD

PC Thanh, DN Phuong, A Holland… - 2020 4th IEEE Electron …, 2020 - ieeexplore.ieee.org
As semiconductor devices shrinks down to sub 10nm range, contact resistance has become
a significant performance factor that needs to be studied. Existing test structures such as …

Nanowire transistor with source and drain induced by electrical contacts with negative Schottky barrier height

PA Clifton, A Goebel, WA Harrison - US Patent 10,505,047, 2019 - Google Patents
(57) ABSTRACT A nanowire transistor includes undoped source and drain regions
electrically coupled with a channel region. A source stack that is electrically isolated from a …

[HTML][HTML] On the feasibility of ab initio electronic structure calculations for cu using a single s orbital basis

G Hegde, RC Bowen - AIP Advances, 2015 - pubs.aip.org
The accuracy of a single s-orbital representation of Cu towards enabling multi-thousand
atom ab initio calculations of electronic structure is evaluated in this work. If an electrostatic …