Analog circuit synthesis entails the creation of both the topology and the sizing (numerical
values) of all of the circuit's components. This paper presents a single uniform approach …

A hierarchically structured framework for analog circuit synthesis is described. This
hierarchical structure has two important features: it decomposes the design task into a …

A silicon compilation system for CMOS operational amplifiers (OPASYN) is discussed. The
synthesis system takes as inputs system-level specifications, fabrication-dependent …

From the explosion of interest, research, and applications of evolutionary computation a new
field emerges-evolutionary electronics. Focused on applying evolutionary computation …

A methodology for the automatic design optimization of analog integrated circuits is
presented. A non-fixed-topology approach is realized by combining the optimization …

Automated subcircuit identification and annotation enables the creation of hierarchical
representations of analog netlists, and can facilitate a variety of design automation tasks …

An expert-systems-based automated design approach for analog circuits is presented. The
approach uses both formal and intuitive knowledge in the design process. A prototype …

This paper presents the results of a formal logic verification system implemented as part of
MIS, the multi-level logic synthesis system developed at UC Berkeley. Combinational logic …

It is a great honor to provide a few words of introduction for Dr. Georges Gielen's and Prof.
Willy Sansen's book" Symbolic analysis for automated design of analog integrated circuits" …

We present a method of automatically generating circuit designs using evolutionary search
and a set of circuit constructing primitives arranged in a linear sequence. This representation …