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Comparison of a 65 nm CMOS Ring-and LC-Oscillator Based PLL in Terms of TID and SEU Sensitivity
J Prinzie, J Christiansen, P Moreira… - … on Nuclear Science, 2016 - ieeexplore.ieee.org
In this work, a comparison has been made between a low noise ring-oscillator and an LC-
oscillator Phase Locked Loop (PLL). An ASIC has been developed to conduct irradiation …
oscillator Phase Locked Loop (PLL). An ASIC has been developed to conduct irradiation …
A 2.56-GHz SEU Radiation Hard -Tank VCO for High-Speed Communication Links in 65-nm CMOS Technology
J Prinzie, J Christiansen, P Moreira… - … on Nuclear Science, 2017 - ieeexplore.ieee.org
This paper presents a radiation tolerant phase-locked loop CMOS application-specified
integrated circuit with an optimized voltage controlled oscillator (VCO) for single-event …
integrated circuit with an optimized voltage controlled oscillator (VCO) for single-event …
Single event transient mitigation techniques for a cross‐coupled LC oscillator, including a single‐event transient hardened CMOS LC‐VCO circuit
A Karthigeyan, S Radha… - IET Circuits, Devices & …, 2022 - Wiley Online Library
Single‐event transients (SETs) due to heavy‐ion (HI) strikes adversely affect the electronic
circuits in the sub‐100 nm regime in the radiation environment. This study proposes …
circuits in the sub‐100 nm regime in the radiation environment. This study proposes …
[HTML][HTML] Analysis and design of integrated blocks for a 6.25 GHz spacefibre PLL
The design of a Phase-Locked Loop (PLL) to generate the clock reference for the new
Spacefibre standard is presented in this paper. Spacefibre has been recently released by …
Spacefibre standard is presented in this paper. Spacefibre has been recently released by …
Time-Dependent Single-Event Effects in CMOS -Oscillators
J Prinzie, V De Smedt - IEEE Transactions on Nuclear Science, 2019 - ieeexplore.ieee.org
This paper presents a general theory of time-dependent single-event effects in CMOS LC-
oscillators. The analysis employs the oscillator's impulse-sensitive function (ISF) to calculate …
oscillators. The analysis employs the oscillator's impulse-sensitive function (ISF) to calculate …
Fault‐tolerant multi‐node coupling triple mode redundancy voltage controlled oscillator for reducing soft error in clock and data recovery
H Yuan, J Chen, B Liang, Y Guo - Electronics Letters, 2019 - Wiley Online Library
A voltage controlled oscillator (VCO) applied to phase‐locked loop with multi‐node coupling
triple mode redundancy is proposed in this Letter. The proposed VCO consists of three …
triple mode redundancy is proposed in this Letter. The proposed VCO consists of three …
Radiation-hardened-by-design clocking circuits in 0.13-μm CMOS technology
We present a single-event-hardened phase-locked loop for frequency generation
applications and a digital delay-locked loop for DDR2 memory interface applications. The …
applications and a digital delay-locked loop for DDR2 memory interface applications. The …
P 型と N 型の MOSFET サイズ比が異なる CMOS 論理回路への γ 線照射の影響と原因
木村有佐， 黒木海斗， 吉田僚一郎， 安藤幹… - 電子情報通信学会 …, 2023 - search.ieice.org
耐放射線性に優れる CMOS 集積回路の設計法の明確化を目的として, MOSFET と CMOS
集積回路に γ 線を照射し, TID (Total Ionizing Dose) 効果の影響を明らかにした. 回路は CMOS …
集積回路に γ 線を照射し, TID (Total Ionizing Dose) 効果の影響を明らかにした. 回路は CMOS …
[PDF][PDF] Analysis and Design of Radiation-Hardened Phase-Locked Loop
S Kim - 2014 - repository.kulib.kyoto-u.ac.jp
Technology scaling has driven the semiconductor industry for several decades. Scaling has
resulted in faster and smaller semiconductor devices, however experienced an increase of …
resulted in faster and smaller semiconductor devices, however experienced an increase of …
Analysis and Design of Radiation-Hardened Phase-Locked
S Kim - IEEE Design & Test of Computers, 2002 - scholar.archive.org
Technology scaling has driven the semiconductor industry for several decades. Scaling has
resulted in faster and smaller semiconductor devices, however experienced an increase of …
resulted in faster and smaller semiconductor devices, however experienced an increase of …