(57) ABSTRACT A method including forming a first test structure and a second test structure
in electrical contact with an inner buried plate and an outer buried plate, respectively, where …

A three dimensional stacked circuit device includes multiple decks of circuit elements, each
deck including multiple tiers of circuit elements. Each deck includes a highly doped hollow …

0005. It should be noted that some details of the FIGS. have been simplified and are drawn
to facilitate understand ing of the inventive embodiments rather than to maintain strict …

(57) ABSTRACT A semiconductor chip has an embedded dynamic random access memory
(eIDRAM) in an independently Voltage con trolled silicon region that is a circuit element …

A semiconductor chip has an independently voltage controlled silicon region that is a circuit
element useful for controlling capacitor values of eDRAM trench capacitors and threshold …

US8138531B2 - Structures, design structures and methods of fabricating global shutter
pixel sensor cells - Google Patents US8138531B2 - Structures, design structures and …

A capacitive element includes a trench extending vertically into a well from a first side. The
trench is filled with a conductive central section clad with an insulating cladding. The …

This application claims the priority benefit of French According to one implementation, said
at least one sac Application for Patent No. 1757906, filed on Aug. 28, 2017, rificial trench …

SUMMARY 0009 Exemplary embodiments of the present invention are directed to a
semiconductor device capable of preventing a punch-through from occurring between …

An integrated circuit may include a pillar of semiconductor material, a field effect transistor
having a channel that is formed in the pillar of semiconductor material, and two or more …