Dielectrics for two-dimensional transition-metal dichalcogenide applications
Despite over a decade of intense research efforts, the full potential of two-dimensional
transition-metal dichalcogenides continues to be limited by major challenges. The lack of …
transition-metal dichalcogenides continues to be limited by major challenges. The lack of …
Liquid-metal-printed ultrathin oxides for atomically smooth 2D material heterostructures
Two-dimensional (2D) semiconductors are promising channel materials for continued
downscaling of complementary metal-oxide-semiconductor (CMOS) logic circuits. However …
downscaling of complementary metal-oxide-semiconductor (CMOS) logic circuits. However …
A 4-Kb 1-to-8-bit configurable 6T SRAM-based computation-in-memory unit-macro for CNN-based AI edge processors
Previous SRAM-based computing-in-memory (SRAM-CIM) macros suffer small read
margins for high-precision operations, large cell array area overhead, and limited …
margins for high-precision operations, large cell array area overhead, and limited …
Gate‐Defined Quantum Confinement in CVD 2D WS2
Temperature‐dependent transport measurements are performed on the same set of
chemical vapor deposition (CVD)‐grown WS2 single‐and bilayer devices before and after …
chemical vapor deposition (CVD)‐grown WS2 single‐and bilayer devices before and after …
A 10 nm FinFET 128 Mb SRAM with assist adjustment system for power, performance, and area optimization
Two 128 Mb 6T SRAM test chips are implemented in a 10 nm FinFET technology. A 0.040
6T SRAM bitcell is designed for high density (HD), and 0.049 for high performance (HP). The …
6T SRAM bitcell is designed for high density (HD), and 0.049 for high performance (HP). The …
Cryogenic CMOS for quantum processing: 5-nm FinFET-based SRAM arrays at 10 K
In this work, we are the first to investigate and model the characteristics of a commercial 5nm
FinFET technology from room temperature (300K) all the way down to cryogenic …
FinFET technology from room temperature (300K) all the way down to cryogenic …
The smallest engine transforming humanity: the past, present, and future
K Kim - 2021 IEEE International Electron Devices Meeting …, 2021 - ieeexplore.ieee.org
Semiconductors, amongst one of the most important innovations of the 20 th century, have
played a pivotal role in the creation of a digitalized, modern industrial society. The global …
played a pivotal role in the creation of a digitalized, modern industrial society. The global …
Cascade current mirror to improve linearity and consistency in SRAM in-memory computing
Z Lin, H Zhan, Z Chen, C Peng, X Wu… - IEEE Journal of Solid …, 2021 - ieeexplore.ieee.org
Although multirow read is essential to achieve static random access memory (SRAM) in-
memory computing (IMC), it may undermine circuit linearity and computational consistency …
memory computing (IMC), it may undermine circuit linearity and computational consistency …
Introducing 5-nm FinFET technology in Microwind
This paper describes the implementation of a high performance FinFET-based 5-nm CMOS
technology in Microwind. After a general presentation of the electronic market and the …
technology in Microwind. After a general presentation of the electronic market and the …
A 32 nm single-ended single-port 7T static random access memory for low power utilization
In this paper, a seven-transistor static random access memory (SRAM) bit cell with a single
bitline architecture is proposed. This cell is designed at 32 nm and is operational at 300 mV …
bitline architecture is proposed. This cell is designed at 32 nm and is operational at 300 mV …