Ultra-efficient on-device object detection on ai-integrated smart glasses with tinyissimoyolo

J Moosmann, P Bonazzi, Y Li, S Bian, P Mayer… - arxiv preprint arxiv …, 2023 - arxiv.org
Smart glasses are rapidly gaining advanced functionality thanks to cutting-edge computing
technologies, accelerated hardware architectures, and tiny AI algorithms. Integrating AI into …

Siracusa: A 16 nm heterogenous RISC-V SoC for extended reality with at-MRAM neural engine

AS Prasad, M Scherer, F Conti, D Rossi… - IEEE Journal of Solid …, 2024 - ieeexplore.ieee.org
Extended reality (XR) applications are machine learning (ML)-intensive, featuring deep
neural networks (DNNs) with millions of weights, tightly latency-bound (10–20 ms end-to …

HAMSA-DI: A low-power dual-issue RISC-V core targeting energy-efficient embedded systems

Y Kra, Y Shoshan, Y Rudin… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
The RISC-V architecture has recently emerged as a popular open source option for the
design of general purpose cores with a wide spectrum of operating specifications. In this …

Flexible and Fully Quantized Lightweight TinyissimoYOLO for Ultra-Low-Power Edge Systems

J Moosmann, H Müller, N Zimmerman… - IEEE …, 2024 - ieeexplore.ieee.org
This paper deploys and explores variants of TinyissimoYOLO, a highly flexible and fully
quantized ultra-lightweight object detection network designed for edge systems with a power …

DSORT-MCU: Detecting Small Objects in Real-Time on Microcontroller Units

L Boyle, J Moosmann, N Baumann, S Heo… - IEEE Sensors …, 2024 - ieeexplore.ieee.org
Advances in lightweight neural networks have revolutionized computer vision in a broad
range of Internet of Things (IoT) applications, encompassing remote monitoring and process …

An 2.31 uJ/Inference Ultra-Low Power Always-On Event-Driven AI-IoT SoC With Switchable nvSRAM Compute-in-Memory Macro

H Sang, W **e, G Park, HJ Yoo - IEEE Transactions on Circuits …, 2024 - ieeexplore.ieee.org
Internet-of-Things (IoT) drives the demand for artificial intelligence (AI) system-on-chips
(SoCs) for vast always-on ultra-low power applications such as human action recognition …

A 772μJ/frame ImageNet Feature Extractor Accelerator on HD Images at 30FPS

I Miro-Panades, V Lorrain, L Billod… - 2024 IEEE Asia …, 2024 - ieeexplore.ieee.org
Many applications benefit from AI inference at the edge, in industry, agriculture and
transportation domains. The observed trend in image/video analysis is to increase the …

Mix-GEMM: Extending RISC-V CPUs for Energy-Efficient Mixed-Precision DNN Inference using Binary Segmentation

J Fornt, E Reggiani, P Fontova-Musté… - IEEE Transactions …, 2024 - ieeexplore.ieee.org
Efficiently computing Deep Neural Networks (DNNs) has become a primary challenge in
today's computers, especially on devices targeting mobile or edge applications. Recent …

Hardware Software Co-design for Multi-threaded Computation on RISC-V-based Multicore System

B Kieu-Do-Nguyen, KD Nguyen, NT Binh, KM Ma… - IEEE …, 2024 - ieeexplore.ieee.org
The open-source and customizable features of the RISC-V Instruction Set Architecture (ISA)
have facilitated its rapid adoption since its publication in 2011. The availability of numerous …

Open-Source Heterogeneous SoCs for AI: The PULP Platform Experience

F Conti, A Garofalo, D Rossi, G Tagliavini… - arxiv preprint arxiv …, 2024 - arxiv.org
Since 2013, the PULP (Parallel Ultra-Low Power) Platform project has been one of the most
active and successful initiatives in designing research IPs and releasing them as open …