Early experience with a commercial hardware transactional memory implementation

D Dice, Y Lev, M Moir, D Nussbaum - Proceedings of the 14th …, 2009 - dl.acm.org
We report on our experience with the hardware transactional memory (HTM) feature of two
pre-production revisions of a new commercial multicore processor. Our experience includes …

Stretching transactional memory

A Dragojević, R Guerraoui, M Kapalka - ACM sigplan notices, 2009 - dl.acm.org
Transactional memory (TM) is an appealing abstraction for programming multi-core systems.
Potential target applications for TM, such as business software and video games, are likely …

Quantitative comparison of hardware transactional memory for Blue Gene/Q, zEnterprise EC12, Intel Core, and POWER8

T Nakaike, R Odaira, M Gaudet, MM Michael… - ACM SIGARCH …, 2015 - dl.acm.org
Transactional Memory (TM) is a new programming paradigm for both simple concurrent
programming and high concurrent performance. Hardware Transactional Memory (HTM) is …

Is Parallel Programming Hard, And, If So, What Can You Do About It?(Release v2023. 06.11 a)

PE McKenney - arxiv preprint arxiv:1701.00854, 2017 - arxiv.org
The purpose of this book is to help you program shared-memory parallel systems without
risking your sanity. Nevertheless, you should think of the information in this book as a …

Hardware transactional memory meets memory persistency

D Castro, P Romano, J Barreto - Journal of Parallel and Distributed …, 2019 - Elsevier
Abstract Persistent Memory (PM) and Hardware Transactional Memory (HTM) are two recent
architectural developments whose joint usage promises to drastically accelerate the …

{Self-Tuning} Intel Transactional Synchronization Extensions

N Diegues, P Romano - … Conference on Autonomic Computing (ICAC 14 …, 2014 - usenix.org
Transactional Memory was recently integrated in Intel processors under the name TSX. We
show that its performance can be significantly affected by the configuration of its interplay …

To lock, swap, or elide: On the interplay of hardware transactional memory and lock-free indexing

D Makreshanski, J Levandoski… - Proceedings of the VLDB …, 2015 - dl.acm.org
The release of hardware transactional memory (HTM) in commodity CPUs has major
implications on the design and implementation of main-memory databases, especially on …

System and method for executing a transaction using parallel co-transactions

MS Moir, RE Cypher, DS Nussbaum - US Patent 8,464,261, 2013 - Google Patents
2003/O1261. 87 A1 7/2003 Won et al. 2005/0278393 A1* 12/2005 Huras et al....................
707/2O2 2006/008.5591 A1 4/2006 Kumar et al. 2007/O143287 A1 6/2007 Adl-tabatabai et …

System and method for managing contention in transactional memory using global execution data

D Dice, MS Moir - US Patent 8,402,464, 2013 - Google Patents
Int. Cl. Transactional Lock Elision (TLE) may allow threads in a G06F 9/46(2006.01) multi-
threaded system to concurrently execute critical sec G06F 9/50(2006.01) tions as …

Contention-conscious, locality-preserving locks

M Chabbi, J Mellor-Crummey - Proceedings of the 21st ACM SIGPLAN …, 2016 - dl.acm.org
Over the last decade, the growing use of cache-coherent NUMA architectures has spurred
the development of numerous locality-preserving mutual exclusion algorithms. NUMA-aware …