[HTML][HTML] Strain engineering in functional materials
Silicon based complementary metal-oxide-semiconductor field-effect-transistor (CMOSFET)
technology has continued to progress unabated for last five decades despite various …
technology has continued to progress unabated for last five decades despite various …
A review of reliability in gate-all-around nanosheet devices
M Wang - Micromachines, 2024 - mdpi.com
The gate-all-around (GAA) nanosheet (NS) field-effect-transistor (FET) is poised to replace
FinFET in the 3 nm CMOS technology node and beyond, marking the second seminal shift in …
FinFET in the 3 nm CMOS technology node and beyond, marking the second seminal shift in …
Demonstration of a p-type ferroelectric FET with immediate read-after-write capability
In this letter, p-type ferroelectric field-effect-transistors (FeFETs) based on HfO 2 and
embedded in GlobalFoundries 28 nm bulk high-metal gate (HKMG) technology (28SLPe) …
embedded in GlobalFoundries 28 nm bulk high-metal gate (HKMG) technology (28SLPe) …
A 3-D TCAD framework for NBTI—Part I: Implementation details and FinFET channel material impact
The time kinetics of interface trap generation and passivation (ΔN IT) and its contribution (ΔV
IT) during and after negative bias temperature instability (NBTI) stress is calculated by using …
IT) during and after negative bias temperature instability (NBTI) stress is calculated by using …
Modeling of NBTI kinetics in RMG Si and SiGe FinFETs, part-I: DC stress and recovery
An ultrafast (10-μs delay) measurement technique is used to characterize the negative bias
temperature instability-induced threshold voltage shift (ΔV T) in replacement metal gate …
temperature instability-induced threshold voltage shift (ΔV T) in replacement metal gate …
Vertical Sandwich GAA FETs With Self-Aligned High-k Metal Gate Made by Quasi Atomic Layer Etching Process
Y Zhang, X Ai, X Yin, H Zhu, H Yang… - … on Electron Devices, 2021 - ieeexplore.ieee.org
We presented and demonstrated a new type of vertical nanowire (NW) and nanosheet (NS)
field-effect transistors (FETs), named vertical sandwich gate-all-around FETs or VSAFETs …
field-effect transistors (FETs), named vertical sandwich gate-all-around FETs or VSAFETs …
Modeling of NBTI using BAT framework: DC-AC stress-recovery kinetics, material, and process dependence
Threshold voltage shift (ΔVT) due to Negative Bias Temperature Instability (NBTI) in p-
MOSFETs is modeled using the BTI Analysis Tool (BAT) framework. The ΔV T time kinetics …
MOSFETs is modeled using the BTI Analysis Tool (BAT) framework. The ΔV T time kinetics …
Superior NBTI in High- SiGe Transistors–Part I: Experimental
SiGe quantum-well pMOSFETs have recently been introduced for enhanced performance of
transistors. Quite surprisingly, a significant reduction in negative bias temperature instability …
transistors. Quite surprisingly, a significant reduction in negative bias temperature instability …
Comparison of DC and AC NBTI kinetics in RMG Si and SiGe p-FinFETs
An ultrafast characterization method is used to study DC and AC NBTI in Si and SiGe
channel core RMG p-FinFETs. The time evolution of degradation during and after stress, and …
channel core RMG p-FinFETs. The time evolution of degradation during and after stress, and …
Predictive TCAD for NBTI stress-recovery in various device architectures and channel materials
A 3-D TCAD framework is proposed for simulating Negative Bias Temperature Instability
(NBTI) in Silicon (Si) and Silicon Germanium (SiGe) channel p-MOSFETs. Different types of …
(NBTI) in Silicon (Si) and Silicon Germanium (SiGe) channel p-MOSFETs. Different types of …