Networks-on-Chip constitute the interconnection architecture of future, massively parallel
multiprocessors that assemble hundreds to thousands of processing cores on a single chip …

The next generation of multiprocessor system on chip (MPSoC) and chip multiprocessors
(CMPs) will contain hundreds or thousands of cores. Such a many‐core system requires …

To alleviate the complex communication problems that arise as the number of on-chip
components increases, network-on-chip (NoC) architectures have been recently proposed …

A path profile determines how many times each acyclic path in a routine executes. This type
of profiling subsumes the more common basic block and edge profiling, which only …

Aggressive transistor scaling continues to drive increasingly complex digital designs. The
large number of transistors available today enables the development of chip multiprocessors …

Extreme transistor technology scaling is causing increasing concerns in device reliability:
the expected lifetime of individual transistors in complex chips is quickly decreasing, and the …

Networks-on-Chip (NoC) are seen as promising interconnect solutions, offering the
advantages of scalability and high-frequency operation which the traditional bus …

The-ary-cube is one of the most important interconnection networks for building network-on-
chips, data center networks, and parallel computing systems owing to its desirable …

Abstract Optical Network on Chip (ONoC) is now considered a promising alternative to
traditional electrical interconnects. Meanwhile, several challenges such as temperature and …

A highly useful resource for professionals and students alike, this cutting-edge, first-of-its-
kind book provides a thorough introduction to nanoscale communication networks. Written in …