Abstract Network-on-chips (NoCs) have been widely employed in the design of
multiprocessor system-on-chips (MPSoCs) as a scalable communication solution. NoCs …

Numerous challenges present themselves when scaling traditional on-chip electrical
networks to large manycore processors. Some of these challenges include high latency …

Current commercial systems-on-chips (SoCs) designs integrate an increasingly large
number of predesigned cores and their number is predicted to increase significantly in the …

Multicore platforms are emerging trends in the design of System-on-Chips (SoCs).
Interconnect fabrics for these multicore SoCs play a crucial role in achieving the target …

Current trends in microprocessor architecture design are leading towards a dramatic
increase of core-level parallelization, wherein a given number of independent processors or …

In this paper, we propose a distributed routing algorithm for vertically partially connected
regular 2D topologies of different shapes and sizes (eg, 2D mesh, torus, ring). The …

This paper presents a discrete particle swarm optimization (PSO)-based strategy to map
applications on both 2-D and 3-D mesh-connected Networks-on-Chip. The basic PSO …

Digital metasurfaces have opened unprecedented ways to accomplish novel
electromagnetic devices thanks to their simple manipulation of electromagnetic waves …

Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip:
The Next Generation of System-on-Chip Integration examines the current issues restricting …

The rising use of deep learning and other big-data algorithms has led to an increasing
demand for hardware platforms that are computationally powerful, yet energy-efficient. Due …