Memory channel that supports near memory and far memory access
B Nale, RK Ramanujan, MP Swaminathan… - US Patent …, 2016 - Google Patents
A semiconductor chip comprising memory controller circuitry having interface circuitry to
couple to a memory channel. The memory controller includes first logic circuitry to implement …
couple to a memory channel. The memory controller includes first logic circuitry to implement …
Apparatus and method for implementing a multi-level memory hierarchy over common memory channels
RK Ramanujan, D Ziakas, DJ Zimmerman… - US Patent …, 2016 - Google Patents
Memory capacity and performance requirements continue to increase with an increasing
number of processor cores and new usage models such as virtualization. In addition …
number of processor cores and new usage models such as virtualization. In addition …
Apparatus and method for implementing a multi-level memory hierarchy having different operating modes
RK Ramanujan, R Agarwal, GJ Hinton - US Patent 9,378,142, 2016 - Google Patents
(57) ABSTRACT A system and method are described for integrating a memory and storage
hierarchy including a non-volatile memory tier within a computer system. In one …
hierarchy including a non-volatile memory tier within a computer system. In one …
Utilization of a distributed index to provide object memory fabric coherency
SJ Frank, L Reback - US Patent 9,965,185, 2018 - Google Patents
Embodiments of the invention provide systems and methods to implement an object memory
fabric. Object memory modules may include object storage storing memory objects, memory …
fabric. Object memory modules may include object storage storing memory objects, memory …
Apparatus and method for implementing a multi-level memory hierarchy
RK Ramanujan, R Agarwal, K Cheng… - US Patent …, 2017 - Google Patents
A system and method are described for integrating a memory and storage hierarchy
including a non-volatile memory tier within a computer system. In one embodiment, PCMS …
including a non-volatile memory tier within a computer system. In one embodiment, PCMS …
In-memory multiply and accumulate with global charge-sharing
A memory circuit has compute-in-memory circuitry that enables a multiply-accumulate (MAC)
operation based on shared charge. Row access circuitry drives multiple rows of a memory …
operation based on shared charge. Row access circuitry drives multiple rows of a memory …
Compute in memory circuits with time-to-digital computation
A memory circuit has compute-in-memory (CIM) circuitry that performs computations based
on time-to-digital conversion (TDC). The memory circuit includes an array of memory cells …
on time-to-digital conversion (TDC). The memory circuit includes an array of memory cells …
Paging of external memory
TA Stabrawa, ZA Cornelius, J Overton… - US Patent …, 2019 - Google Patents
ABSTRACT A memory appliance may be provided comprising a proces sor, a
communication interface, a memory, and a region access unit. The memory may be …
communication interface, a memory, and a region access unit. The memory may be …
Infinite memory fabric hardware implementation with router
SJ Frank, L Reback - US Patent 9,886,210, 2018 - Google Patents
Embodiments of the invention provide systems and methods for managing processing,
memory, storage, network, and cloud computing to significantly improve the efficiency and …
memory, storage, network, and cloud computing to significantly improve the efficiency and …
Implementation of an object memory centric cloud
SJ Frank, L Reback - US Patent 11,755,201, 2023 - Google Patents
Embodiments of the invention provide systems and methods to implement an object memory
fabric including hardware-based processing nodes having memory modules storing and …
fabric including hardware-based processing nodes having memory modules storing and …