A case for intelligent RAM
Two trends call into question the current practice of fabricating microprocessors and DRAMs
as different chips on different fabrication lines. The gap between processor and DRAM …
as different chips on different fabrication lines. The gap between processor and DRAM …
A survey of processors with explicit multithreading
T Ungerer, B Robič, J Šilc - ACM Computing Surveys (CSUR), 2003 - dl.acm.org
Hardware multithreading is becoming a generally applied technique in the next generation
of microprocessors. Several multithreaded processors are announced by industry or already …
of microprocessors. Several multithreaded processors are announced by industry or already …
Domain-specific hardware accelerators
Domain-specific hardware accelerators Page 1 48 COMMUNICATIONS OF THE ACM | JULY
2020 | VOL. 63 | NO. 7 contributed articles FROM THE SIMPLE embedded processor in your …
2020 | VOL. 63 | NO. 7 contributed articles FROM THE SIMPLE embedded processor in your …
Symbiotic jobscheduling for a simultaneous multithreaded processor
Simultaneous Multithreading machines fetch and execute instructions from multiple
instruction streams to increase system utilization and speedup the execution of jobs. When …
instruction streams to increase system utilization and speedup the execution of jobs. When …
Hyper-Threading Technology Architecture and Microarchitecture.
DT Marr, F Binns, DL Hill, G Hinton… - Intel Technology …, 2002 - search.ebscohost.com
Abstract Intel's Hyper-Threading Technology brings the concept of simultaneous multi-
threading to the Intel Architecture. Hyper-Threading Technology makes a single physical …
threading to the Intel Architecture. Hyper-Threading Technology makes a single physical …
Exploiting choice: Instruction fetch and issue on an implementable simultaneous multithreading processor
Simultaneous multithreading is a technique that permits multiple independent threads to
issue multiple instructions each cycle. In previous work we demonstrated the performance …
issue multiple instructions each cycle. In previous work we demonstrated the performance …
Clock rate versus IPC: The end of the road for conventional microarchitectures
V Agarwal, MS Hrishikesh, SW Keckler… - Proceedings of the 27th …, 2000 - dl.acm.org
The doubling of microprocessor performance every three years has been the result of two
factors: more transistors per chip and superlinear scali ng of the processor clock with …
factors: more transistors per chip and superlinear scali ng of the processor clock with …
Simultaneous multithreading: A platform for next-generation processors
Simultaneous multithreading is a processor design which consumes both thread-level and
instruction-level parallelism. In SMT processors, thread-level parallelism can come from …
instruction-level parallelism. In SMT processors, thread-level parallelism can come from …
The potential for using thread-level data speculation to facilitate automatic parallelization
JG Steffan, TC Mowry - Proceedings 1998 Fourth International …, 1998 - ieeexplore.ieee.org
As we look to the future, and the prospect of a billion transistors on a chip, it seems
inevitable that microprocessors will exploit having multiple parallel threads. To achieve the …
inevitable that microprocessors will exploit having multiple parallel threads. To achieve the …
A chip-multiprocessor architecture with speculative multithreading
Much emphasis is now being placed on chip-multiprocessor (CMP) architectures for
exploiting thread-level parallelism in applications. In such architectures, speculation may be …
exploiting thread-level parallelism in applications. In such architectures, speculation may be …