Natural image denoising: Optimality and inherent bounds

A Levin, B Nadler - CVPR 2011, 2011 - ieeexplore.ieee.org
The goal of natural image denoising is to estimate a clean version of a given noisy image,
utilizing prior knowledge on the statistics of natural images. The problem has been studied …

Information assurance through redundant design: A novel TNU error-resilient latch for harsh radiation environment

A Yan, Y Hu, J Cui, Z Chen, Z Huang… - IEEE Transactions …, 2020 - ieeexplore.ieee.org
In nano-scale CMOS technologies, storage cells such as latches are becoming increasingly
sensitive to triple-node-upset (TNU) errors caused by harsh radiation effects. In the context …

Latch susceptibility to transient faults and new hardening approach

M Omana, D Rossi, C Metra - IEEE Transactions on Computers, 2007 - ieeexplore.ieee.org
In this paper we analyze the conditions making Transient Faults (TFs) affecting the nodes of
conventional latch structures generate output Soft-Errors (SEs). We investigate the …

Design of robust SRAM cells against single-event multiple effects for nanometer technologies

R Rajaei, B Asgari, M Tabandeh… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
As technology size scales down toward lower two-digit nanometer dimensions, sensitivity of
CMOS circuits to radiation effects increases. Static random access memory cells (SRAMs) …

Heterogenous quorum-based wake-up scheduling in wireless sensor networks

S Lai, B Ravindran, H Cho - IEEE Transactions on Computers, 2010 - ieeexplore.ieee.org
We present heterogenous quorum-based asynchronous wake-up scheduling schemes for
wireless sensor networks. The schemes can ensure that two nodes that adopt different …

High-performance robust latches

M Omaña, D Rossi, C Metra - IEEE Transactions on Computers, 2010 - ieeexplore.ieee.org
First, a new high-performance robust latch (referred to as HiPeR latch) is presented that is
insensitive to transient faults affecting its internal and output nodes by design, independently …

Design and performance evaluation of radiation hardened latches for nanoscale CMOS

S Lin, YB Kim, F Lombardi - IEEE transactions on very large …, 2010 - ieeexplore.ieee.org
Deep sub-micrometer/nano CMOS circuits are more sensitive to externally induced radiation
phenomena that are likely to cause the occurrence of so-called soft errors. Therefore, the …

Multiple transient faults in logic: An issue for next generation ICs?

D Rossi, M Omana, F Toma… - 20th IEEE International …, 2005 - ieeexplore.ieee.org
In this paper, we first evaluate whether or not a multiple transient fault (multiple TF)
generated by the hit of a single cosmic ray neutron can give rise to a bidirectional error at the …

Feedback redundancy: A power efficient SEU-tolerant latch design for deep sub-micron technologies

M Fazeli, A Patooghy, SG Miremadi… - 37th Annual IEEE/IFIP …, 2007 - ieeexplore.ieee.org
The continuous decrease in CMOS technology feature size increases the susceptibility of
such circuits to single event upsets (SEU) caused by the impact of particle strikes on system …

Low-cost highly-robust hardened cells using blocking feedback transistors

M Nicolaidis, R Perez… - 26th IEEE VLSI Test …, 2008 - ieeexplore.ieee.org
CMOS nanometric technologies are increasingly sensitive to soft errors, including SEUs
affecting storage cells and SETs initiated in the combinational logic, and eventually captured …