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Nanometer-Scale III-V MOSFETs
JA Del Alamo, DA Antoniadis, J Lin… - IEEE Journal of the …, 2016 - ieeexplore.ieee.org
After 50 years of Moore's Law, Si CMOS, the mainstream logic technology, is on a course of
diminishing returns. The use of new semiconductor channel materials with improved …
diminishing returns. The use of new semiconductor channel materials with improved …
III–V nanowire transistors for low-power logic applications: a review and outlook
III-V semiconductors, especially InAs, have much higher electron mobilities than Si and have
been considered as promising candidates for n-channel materials for post-Si low-power …
been considered as promising candidates for n-channel materials for post-Si low-power …
III–V compound semiconductor transistors—from planar to nanowire structures
Conventional silicon transistor scaling is fast approaching its limits. An extension of the logic
device roadmap to further improve future performance increases of integrated circuits is …
device roadmap to further improve future performance increases of integrated circuits is …
III–V nanowire complementary metal–oxide semiconductor transistors monolithically integrated on Si
III–V semiconductors have attractive transport properties suitable for low-power, high-speed
complementary metal–oxide-semiconductor (CMOS) implementation, but major challenges …
complementary metal–oxide-semiconductor (CMOS) implementation, but major challenges …
High-frequency gate-all-around vertical InAs nanowire MOSFETs on Si substrates
We demonstrate a vertical InAs nanowire MOSFET integrated on Si substrate with an
extrinsic peak cut-off frequency of 103 GHz and a maximum oscillation frequency of 155 …
extrinsic peak cut-off frequency of 103 GHz and a maximum oscillation frequency of 155 …
Vertical InAs/InGaAs heterostructure metal–oxide–semiconductor field-effect transistors on Si
III–V compound semiconductors offer a path to continue Moore's law due to their excellent
electron transport properties. One major challenge, integrating III–V's on Si, can be …
electron transport properties. One major challenge, integrating III–V's on Si, can be …
Combining axial and radial nanowire heterostructures: Radial Esaki diodes and tunnel field-effect transistors
The ever-growing demand on high-performance electronics has generated transistors with
very impressive figures of merit (Radosavljevic et al., IEEE Int. Devices Meeting 2009, 1–4 …
very impressive figures of merit (Radosavljevic et al., IEEE Int. Devices Meeting 2009, 1–4 …
A High-Frequency Transconductance Method for Characterization of High- Border Traps in III-V MOSFETs
A novel method that reveals the spatial distribution of border traps in III-V metal-oxide-
semiconductor field-effect transistors (MOSFETs) is presented. The increase in …
semiconductor field-effect transistors (MOSFETs) is presented. The increase in …
High-Speed Planar GaAs Nanowire Arrays with fmax > 75 GHz by Wafer-Scale Bottom-up Growth
Wafer-scale defect-free planar III–V nanowire (NW) arrays with∼ 100% yield and precisely
defined positions are realized via a patterned vapor–liquid–solid (VLS) growth method …
defined positions are realized via a patterned vapor–liquid–solid (VLS) growth method …
High frequency III–V nanowire MOSFETs
E Lind - Semiconductor Science and Technology, 2016 - iopscience.iop.org
III–V nanowire transistors are promising candidates for very high frequency electronics
applications. The improved electrostatics originating from the gate-all-around geometry …
applications. The improved electrostatics originating from the gate-all-around geometry …