A low-jitter and low-reference-spur 320 GHz signal source with an 80 GHz integer-N phase-locked loop using a quadrature XOR technique
This article reports a 320-GHz low-jitter and low-reference-spur signal source consisting of
an 80-GHz integer-phase-locked loop (PLL) and a 320-GHz frequency quadrupler. The 80 …
an 80-GHz integer-phase-locked loop (PLL) and a 320-GHz frequency quadrupler. The 80 …
A 40 GHz CMOS PLL With −75-dBc Reference Spur and 121.9-fsrms Jitter Featuring a Quadrature Sampling Phase-Frequency Detector
The high phase noise (PN) of CMOS millimeter-wave oscillators has encouraged the
adoption of wide loop bandwidth for an integer-phase-locked loop (PLL). This article …
adoption of wide loop bandwidth for an integer-phase-locked loop (PLL). This article …
A 23.4 mW− 72-dBc Reference Spur 40 GHz CMOS PLL Featuring a Spur-Compensation Phase Detector
This letter introduces a novel phase detector (PD) for suppressing the reference spur in a 40
GHz integer-phase-locked loop (PLL). Coined as a spur-compensation phase detector …
GHz integer-phase-locked loop (PLL). Coined as a spur-compensation phase detector …
A 5-pJ/bit OOK transmitter using MEMS-based RF oscillator for IoT application in 180-nm CMOS
An 800-MHz OOK transmitter for short-range Internet-of-Things (IoT) applications is
presented in this letter. The OOK transmitter utilizes a microelectromechanical system …
presented in this letter. The OOK transmitter utilizes a microelectromechanical system …
A 28.8-to-43.2 GHz 79.8 fs Jitter and 78.5 dBc Reference Spur PLL Exploiting Complementary Mixing Phase Detector With Mismatch Calibration
Millimeter-wave (mmW) phase-locked loops (PLLs) prefer large loop bandwidth for
suppressing more voltage-controlled oscillator (VCO) phase noise, which, in turn, degrades …
suppressing more voltage-controlled oscillator (VCO) phase noise, which, in turn, degrades …
An Ultra-Low-Voltage Bias-Current-Free Fractional- Hybrid PLL With Voltage-Mode Phase Detection and Interpolation
L Feng, X Ji, L Kuang, Q Liao, S Han… - IEEE Journal of Solid …, 2024 - ieeexplore.ieee.org
This article presents an ultra-low voltage (ULV) fractional-N hybrid phase-locked loop (PLL)
without requiring bias current. A time-interleaved flip-flop phase detector (TI-FFPD) with duty …
without requiring bias current. A time-interleaved flip-flop phase detector (TI-FFPD) with duty …
Spur Canceling Technique by Folded xor Gate Phase Detector and Its Application to a Millimeter-Wave SiGe BiCMOS PLL
A folded XOR gate (FXOR) phase detector (PD) is proposed for millimeter-wave (mmW)
SiGe integer-phase-locked loops (PLLs) to relax the tradeoff between PLL loop bandwidth …
SiGe integer-phase-locked loops (PLLs) to relax the tradeoff between PLL loop bandwidth …
An 11 pJ/Bit Multichannel OOK/FSK/QPSK Transmitter With Multi-Phase Injection-Locking and Frequency Multiplication Techniques
KW Cheng, SK Chang, ST Chang… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
A 423.5-450 MHz low-power OOK/FSK/QPSK wireless transmitter is proposed with multi-
phase injection locking and frequency multiplication techniques. A low-frequency phase …
phase injection locking and frequency multiplication techniques. A low-frequency phase …
A 14.2 mW 29-39.3-GHz two-stage PLL with a current-reuse coupled mixer phase detector
A Ka-band millimeter wave (mmW) integer-N phase-locked loop (PLL) exploiting a novel
current-reuse coupled mixer (CRCM) phase detector (PD) is proposed. Aiming to attenuate …
current-reuse coupled mixer (CRCM) phase detector (PD) is proposed. Aiming to attenuate …
Improved performance tradeoffs in harmonic injection-locked ULP TX for sub-GHz radios
This article presents a digital-intensive transmitter (TX) architecture for ultralow-power (ULP)
wireless communication telemetry applications. A Type-I correction loop is proposed to …
wireless communication telemetry applications. A Type-I correction loop is proposed to …