An error checking and correcting (ECC) decoding method and apparatus are provided. A
decoding circuit decodes a codeword using (or without using) reference information …

A primary source of increased read time on NAND flash comes from the fact that, in the
presence of noise, the flash medium must be read several times using different read …

According to one embodiment, a memory controller includes: a memory I/F that reads a
codeword written in a NAND memory as any one of hard-bit information, first soft-bit …

Systems and methods disclosed herein are used to efficiently manage low read data. In one
aspect, a method includes, in response to detecting occurrence of a first event (eg, PFail) …

Systems, methods and/or devices are used to enable tracking intermix of writes and un-map
commands across power cycles. In one aspect, the method includes (1) receiving, at a …

6.401213 Bi 6/2002 Jeddeloh 2015, 0262632 A1 9, 2015 Shelton et al. 6, 449709 B1 9,
2002 Gates 2015, 030.1749 A1* 10, 2015 Seo....................... G06F 3, 0611 8,122.202 B2 …

Methods, systems and/or devices are used for limiting write command execution in a storage
device comprising a set of non-volatile memory devices. In one aspect, the method includes …

5,909,559 A 6, 1999 SO 2014/0229655 A1 8/2014 Goss et al. 6,247,136 B1 6, 2001
MacWilliams et al. 2014/0229656 A1 8/2014 Goss et al. 6,292,410 B1 9/2001 Yi et al …

Abstract Systems, methods and/or devices are used to adjust a read property for a memory
portion of non-volatile memory. In one aspect, in response to receiving a program request …

Memory systems may include an encoder suitable for arranging data in rows of data blocks
as a plurality of codewords, and permuting the data block rows and constructing row parities …