The monolithic hetero-integration of III/V materials on Si substrates could enable a multitude
of new device applications and functionalities which would benefit from both the excellent …

When the international technology roadmap of semiconductors (ITRS) started almost five
decades ago, the metal oxide effect transistor (MOSFET) as units in integrated circuits (IC) …

Vertical III-V nanowire MOSFETs have demonstrated excellent performance including high
transconductance and high Ion. One main bottleneck for the vertical MOSFETs is the large …

Vertical InAs/InGaAs nanowire MOSFETs are fabricated in a gate-last fabrication process,
which allows gate-lengths down to 25 nm and accurate gate-alignment. These devices …

The excellent properties of III–V semiconductors make them intriguing candidates for next-
generation electronics and optoelectronics. Their nanowire (NW) counterparts further …

This letter introduces a novel alcohol-based digital etch technique for III-V FinFET and
nanowire MOSFET fabrication. The new technique addresses the limitations of the …

In this paper, we demonstrate InGaAs FinFETs 3-D sequentially (3DS) integrated on top of a
fully depleted silicon-on-insulator CMOS. Top layer III-V FETs are fabricated using a Si …

Abstract Three-dimensional (3D) monolithic integration can enable higher density and has
the potential to stack independently optimized layers at transistor level. Owing to high …

In this article, sub-10 nm top width nanowire In 0.53 Ga 0.47 As gate-all-around (GAA)
MOSFETs with improved subthreshold characteristics and reliability are demonstrated …

This letter presents a remote NH 3/N 2 plasma treatment after gate oxide deposition for
improving the electrical characteristics and the reliability of In 0.53 Ga 0.47 As FinFET. The …