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Single-event effect responses of integrated planar inductors in 65-nm CMOS
This article describes a previously unreported single-event radiation effect in spiral inductors
manufactured in a commercial CMOS technology when subjected to ionizing radiation …
manufactured in a commercial CMOS technology when subjected to ionizing radiation …
Design and Verification of a 6.25 GHz LC-Tank VCO Integrated in 65 nm CMOS Technology Operating up to 1 Grad TID
This article presents the design of an LC-Tank voltage-controlled oscillator (VCO) for space
and high-energy physics (HEP) applications. The main goal of this work is to design a …
and high-energy physics (HEP) applications. The main goal of this work is to design a …
SISSA: The lpGBT PLL and CDR Architecture, Performance and SEE Robustness
We present the design, architecture and experimental results of the low jitter Clock and Data
Recovery (CDR) and Phase Locked Loop (PLL) circuit in the Low-Power Gigabit …
Recovery (CDR) and Phase Locked Loop (PLL) circuit in the Low-Power Gigabit …
Source switched charge-pump PLLs for high-dose radiation environments
This article presents a radiation tolerant charge-pump phase-locked loop (PLL) with low
static phase error variability suitable for high-performance clock systems in high-dose …
static phase error variability suitable for high-performance clock systems in high-dose …
A low noise fault tolerant radiation hardened 2.56 Gbps clock-data recovery circuit with high speed feed forward correction in 65 nm CMOS
A fault tolerant, radiation hardened Clock and Data Recovery (CDR) architecture is
presented for high-energy physics and space applications. The CDR employs a novel soft …
presented for high-energy physics and space applications. The CDR employs a novel soft …
A Radiation-Hardened 15–22-GHz Frequency Synthesizer in 22-nm FinFET
High-speed radiation-hardened frequency synthesizers are a key block in spaceborne
communications systems. This article presents a 15–22-GHz radiation-hardened phase …
communications systems. This article presents a 15–22-GHz radiation-hardened phase …
Voltage-controlled oscillator utilizing inverse-mode SiGe-HBT biasing circuit for the mitigation of single-event effects
The advantages and the tradeoffs associated with the use of inverse-mode (IM) silicon–
germanium (SiGe) heterojunction bipolar transistors (HBTs) biasing circuitry in radio …
germanium (SiGe) heterojunction bipolar transistors (HBTs) biasing circuitry in radio …
CDP1—A data concentrator prototype for the deep underground neutrino experiment
The design, power analysis, and tests of a first COLDATA Prototype (CDP1) design in a 65-
nm process for the long baseline neutrino facility (LBNF) and the deep underground …
nm process for the long baseline neutrino facility (LBNF) and the deep underground …
Single-Event Effects Characterization of LC-VCO PLLs in a 28-nm CMOS Technology
Two-photon absorption laser experiments are conducted on a low-jitter tunable hybrid
analog-digital LC-tank phase-locked loop (PLL) in a 28-nm bulk CMOS technology. The …
analog-digital LC-tank phase-locked loop (PLL) in a 28-nm bulk CMOS technology. The …
Single event transient mitigation techniques for a cross‐coupled LC oscillator, including a single‐event transient hardened CMOS LC‐VCO circuit
Single‐event transients (SETs) due to heavy‐ion (HI) strikes adversely affect the electronic
circuits in the sub‐100 nm regime in the radiation environment. This study proposes …
circuits in the sub‐100 nm regime in the radiation environment. This study proposes …