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A Comprehensive Survey of Benchmarks for Improvement of Software's Non-Functional Properties
Despite recent increase in research on improvement of non-functional properties of
software, such as energy usage or program size, there is a lack of standard benchmarks for …
software, such as energy usage or program size, there is a lack of standard benchmarks for …
Robust non-rigid motion tracking and surface reconstruction using l0 regularization
We present a new motion tracking method to robustly reconstruct non-rigid geometries and
motions from single view depth inputs captured by a consumer depth sensor. The idea …
motions from single view depth inputs captured by a consumer depth sensor. The idea …
[BOG][B] The compiler design handbook: optimizations and machine code generation
YN Srikant, P Shankar - 2002 - taylorfrancis.com
The widespread use of object-oriented languages and Internet security concerns are just the
beginning. Add embedded systems, multiple memory banks, highly pipelined units …
beginning. Add embedded systems, multiple memory banks, highly pipelined units …
Exploiting function similarity for code size reduction
TJK Edler von Koch, B Franke, P Bhandarkar… - Proceedings of the …, 2014 - dl.acm.org
For cost-sensitive or memory constrained embedded systems, code size is at least as
important as performance. Consequently, compact code generation has become a major …
important as performance. Consequently, compact code generation has become a major …
Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode
K Hepola, J Multanen… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
Transport triggered architectures (TTAs) follow the static programming model of very long
instruction word (VLIW) processors but expose additional information of the processor …
instruction word (VLIW) processors but expose additional information of the processor …
Clustered loop buffer organization for low energy VLIW embedded processors
M Jayapala, F Barat, T Vander Aa… - IEEE Transactions …, 2005 - ieeexplore.ieee.org
Current loop buffer organizations for very large instruction word processors are essentially
centralized. As a consequence, they are energy inefficient and their scalability is limited. To …
centralized. As a consequence, they are energy inefficient and their scalability is limited. To …
Processor pipelines and their properties for static WCET analysis
J Engblom, B Jonsson - … , EMSOFT 2002 Grenoble, France, October 7–9 …, 2002 - Springer
When develo** real-time systems, the worst-case execution time (WCET) is a commonly
used measure for predicting and analyzing program and system timing behavior. Such …
used measure for predicting and analyzing program and system timing behavior. Such …
Power-aware compilation for register file energy reduction
JL Ayala, A Veidenbaum, M López-Vallejo - International Journal of …, 2003 - Springer
Most power reduction techniques have focused on gating the clock to unused functional
units to minimize static power consumption, while system level optimizations have been …
units to minimize static power consumption, while system level optimizations have been …
Code compression for embedded VLIW processors using variable-to-fixed coding
Y **e, W Wolf, H Lekatsas - IEEE Transactions on Very Large …, 2006 - ieeexplore.ieee.org
In embedded system design, memory is one of the most restricted resources, posing serious
constraints on program size. Code compression has been used as a solution to reduce the …
constraints on program size. Code compression has been used as a solution to reduce the …
Architecture description language (ADL)-driven software toolkit generation for architectural exploration of programmable SOCs
Advances in semiconductor technology permit increasingly complex applications to be
realized using programmable systems-on-chips (SOCs). Furthermore, shrinking time-to …
realized using programmable systems-on-chips (SOCs). Furthermore, shrinking time-to …