Coordinated management of processor configuration and cache partitioning to optimize energy under QoS constraints

M Nejat, M Manivannan, M Pericas… - 2020 IEEE …, 2020 - ieeexplore.ieee.org
An effective way to improve energy efficiency is to throttle hardware resources to meet a
certain QoS target, specified as a performance constraint, associated with all applications …

Hardware-validated performance and power modelling of heterogeneous multi-processing architectures

M Walker - 2019 - eprints.soton.ac.uk
Modern processors are becoming increasingly more complex and utilise higher numbers of
Heterogeneous Multi-Processing (HMP) cores. Energy-efficiency has become the primary …