A review of 0.18-/spl mu/m full adder performances for tree structured arithmetic circuits
CH Chang, J Gu, M Zhang - IEEE Transactions on very large …, 2005 - ieeexplore.ieee.org
The general objective of our work is to investigate the area and power-delay performances
of low-voltage full adder cells in different CMOS logic styles for the predominating tree …
of low-voltage full adder cells in different CMOS logic styles for the predominating tree …
Digital and analog TFET circuits: Design and benchmark
In this work, we investigate by means of simulations the performance of basic digital, analog,
and mixed-signal circuits employing tunnel-FETs (TFETs). The analysis reviews and …
and mixed-signal circuits employing tunnel-FETs (TFETs). The analysis reviews and …
Low-power and fast full adder by exploring new XOR and XNOR gates
In this paper, novel circuits for XOR/XNOR and simultaneous XOR-XNOR functions are
proposed. The proposed circuits are highly optimized in terms of the power consumption …
proposed. The proposed circuits are highly optimized in terms of the power consumption …
Logic computing with stateful neural networks of resistive switches
Brain‐inspired neural networks can process information with high efficiency, thus providing
a powerful tool for pattern recognition and other artificial intelligent tasks. By adopting binary …
a powerful tool for pattern recognition and other artificial intelligent tasks. By adopting binary …
Using plane+ parallax for calibrating dense camera arrays
A light field consists of images of a scene taken from different viewpoints. Light fields are
used in computer graphics for image-based rendering and synthetic aperture photography …
used in computer graphics for image-based rendering and synthetic aperture photography …
An area efficient 64-bit square root carry-select adder for low power applications
Y He, CH Chang, J Gu - 2005 IEEE International Symposium …, 2005 - ieeexplore.ieee.org
The carry-select method has deemed to be a good compromise between cost and
performance in carry propagation adder design. However, the conventional carry-select …
performance in carry propagation adder design. However, the conventional carry-select …
[書籍][B] Reversible computing: fundamentals, quantum computing, and applications
A De Vos - 2011 - books.google.com
Written by one of the few top internationally recognized experts in the field, this book
concentrates on those topics that will remain fundamental, such as low power computing …
concentrates on those topics that will remain fundamental, such as low power computing …
A novel low-power full-adder cell for low voltage
This paper presents a novel low-power majority function-based 1-bit full adder that uses
MOS capacitors (MOSCAP) in its structure. It can work reliably at low supply voltage. In this …
MOS capacitors (MOSCAP) in its structure. It can work reliably at low supply voltage. In this …
Design of two Low-Power full adder cells using GDI structure and hybrid CMOS logic style
Full adder is one of the most important digital components for which many improvements
have been made to improve its architecture. In this paper, we present two new symmetric …
have been made to improve its architecture. In this paper, we present two new symmetric …