Design space exploration for efficient resource utilization in coarse-grained reconfigurable architecture

Y Kim, RN Mahapatra, K Choi - IEEE transactions on very large …, 2009 - ieeexplore.ieee.org
Coarse-grained reconfigurable architectures (CGRAs) aim to achieve both goals of high
performance and flexibility. In addition, power consumption is significant for the …

Integrated kernel partitioning and scheduling for coarse-grained reconfigurable arrays

G Ansaloni, K Tanimura, L Pozzi… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
Coarse-grained reconfigurable arrays (CGRAs) are a promising class of architectures
conjugating flexibility and efficiency. Devising effective methodologies to map applications …

Power-conscious configuration cache structure and code map** for coarse-grained reconfigurable architecture

Y Kim, I Park, K Choi, Y Paek - … of the 2006 international symposium on …, 2006 - dl.acm.org
Coarse-grained reconfigurable architecture aims to achieve both performance and flexibility.
However, power consumption is no less important for the reconfigurable architecture to be …

High performance and area efficient flexible DSP datapath synthesis

S Xydis, G Economakos, D Soudris… - IEEE transactions on …, 2009 - ieeexplore.ieee.org
This paper presents a new methodology for the synthesis of high performance flexible
datapaths, targeting computationally intensive digital signal processing kernels of …

Dynamic context compression for low-power coarse-grained reconfigurable architecture

Y Kim, RN Mahapatra - IEEE transactions on very large scale …, 2009 - ieeexplore.ieee.org
Most of the coarse-grained reconfigurable architectures (CGRAs) are composed of
reconfigurable ALU arrays and configuration cache (or context memory) to achieve high …

Low power processor architectures and contemporary techniques for power optimization–a review

MY Qadri, HS Gujarathi… - Journal of …, 2009 - repository.essex.ac.uk
The technological evolution has increased the number of transistors for a given die area
significantly and increased the switching speed from few MHz to GHz range. Such inversely …

Low power reconfiguration technique for coarse-grained reconfigurable architecture

Y Kim, RN Mahapatra, I Park… - IEEE transactions on very …, 2009 - ieeexplore.ieee.org
Coarse-grained reconfigurable architectures (CGRAs) require many processing elements
(PEs) and a configuration memory unit (configuration cache) for reconfiguration of its PE …

Register file architecture optimization in a coarse-grained reconfigurable architecture

Z Kwok, SJE Wilton - 13th Annual IEEE Symposium on Field …, 2005 - ieeexplore.ieee.org
This paper investigates the impact of the local and global register file architecture on a
reconfigurable system based on the ADRES architecture. The register files consume a …

Configuration map** algorithms to reduce energy and time reconfiguration overheads in reconfigurable systems

JA Clemente, EP Ramo, J Resano… - IEEE transactions on …, 2013 - ieeexplore.ieee.org
In spite of the increasing success of reconfigurable hardware, the dynamic reconfiguration
can introduce important overheads, both in terms of energy consumption and time …

[LIBRO][B] Dynamic memory management for embedded systems

DA Alonso, S Mamagkakis, C Poucet, M Peón-Quirós… - 2015 - Springer
Modern embedded systems in mobile and multimedia applications offer a wide range of
features. They can also communicate to different devices using different standards which …