A survey of neuromorphic computing and neural networks in hardware
Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices,
and models that contrast the pervasive von Neumann computer architecture. This …
and models that contrast the pervasive von Neumann computer architecture. This …
On training efficiency and computational costs of a feed forward neural network: A review
A comprehensive review on the problem of choosing a suitable activation function for the
hidden layer of a feed forward neural network has been widely investigated. Since the …
hidden layer of a feed forward neural network has been widely investigated. Since the …
[HTML][HTML] Data multiplexed and hardware reused architecture for deep neural network accelerator
Despite many decades of research on high-performance Deep Neural Network (DNN)
accelerators, their massive computational demand still requires resource-efficient, optimized …
accelerators, their massive computational demand still requires resource-efficient, optimized …
An optimized lookup-table for the evaluation of sigmoid function for artificial neural networks
PK Meher - 2010 18th IEEE/IFIP International Conference on …, 2010 - ieeexplore.ieee.org
In this paper, we present an efficient design of lookup-table (LUT) for the evaluation of
hyperbolic tangent sigmoid to be used for the hardware implementation of artificial neural …
hyperbolic tangent sigmoid to be used for the hardware implementation of artificial neural …
Sigmoid function implementation using the unequal segmentation of differential lookup table and second order nonlinear function
S Ngah, RA Bakar - Journal of Telecommunication, Electronic and …, 2017 - jtec.utem.edu.my
This paper discusses the artificial neural network (ANN) implementation into a field
programmable gate array (FPGA). One of the most difficult problem encounters is the …
programmable gate array (FPGA). One of the most difficult problem encounters is the …
[PDF][PDF] Implementation of a sigmoid activation function for neural network using FPGA
In this paper, the design of a single neuron which contains a sigmoid activation function was
proposed and implemented using the FPGAs (Field Programmable Gate Array) techniques …
proposed and implemented using the FPGAs (Field Programmable Gate Array) techniques …
Resource efficient activation functions for neural network accelerators
Implementations of machine learning models in resource-limited embedded systems are
becoming highly desired. This has led to a need for resource-efficient building blocks for …
becoming highly desired. This has led to a need for resource-efficient building blocks for …
[PDF][PDF] Two-steps implementation of sigmoid function for artificial neural network in field programmable gate array
The complex equation of sigmoid function is one of the most difficult problems encountered
for implementing the artificial neural network (ANN) into a field programmable gate array …
for implementing the artificial neural network (ANN) into a field programmable gate array …
FPGA based performance comparison of different basic adder topologies with parallel processing adder
A Ajit, PV Arathi, K Haridas… - 2019 3rd International …, 2019 - ieeexplore.ieee.org
Adders are an almost requisite element of every modern integrated circuit. As in the current
era of increasing digitalization, where everyone works towards miniaturization, three …
era of increasing digitalization, where everyone works towards miniaturization, three …
Hardware implementation of hyperbolic tangent activation function for floating point formats
TKR Arvind, M Brand, C Heidorn… - … Symposium on VLSI …, 2020 - ieeexplore.ieee.org
In this paper, we present the efficient hardware implementation of hyperbolic tangent
activation function, which is most widely used in artificial neural networks for accelerating …
activation function, which is most widely used in artificial neural networks for accelerating …