Low-power test pattern generator using modified LFSR
V Govindaraj, S Dhanasekar, K Martinsagayam… - Aerospace …, 2024 - Springer
Low-power designs are getting increased significance in numerous applications like high-
performance computing and wireless communication due to the rise in power dissipation …
performance computing and wireless communication due to the rise in power dissipation …
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Testing becomes an inevitable part of the VLSI circuit. All the circuits or products must be
verified before delivery. The data collected during testing is used to remove the faulty parts …
verified before delivery. The data collected during testing is used to remove the faulty parts …
Design of test pattern generator (TPG) by an optimized low power design for testability (DFT) for scan BIST circuits using transmission gates
G Naveen Balaji, S Chenthur Pandian - Cluster Computing, 2019 - Springer
Lessening power consumption during the test and reducing test time are the main goals of
this paper. The power consumption is a major problem of movable equipment which needs …
this paper. The power consumption is a major problem of movable equipment which needs …
Energy-efficient scheme for multiple scan-chains BIST using weight-based segmentation
AS Abu-Issa - IEEE Transactions on Circuits and Systems II …, 2016 - ieeexplore.ieee.org
This brief presents a weighted-based cell segmentation algorithm for a multiple scan-chains
built-in self-test in order to reduce the average power consumption when scanning new test …
built-in self-test in order to reduce the average power consumption when scanning new test …
Low power test pattern generation using test-per-scan technique for BIST implementation
This paper introduces the function of test cases with minimal power for Built-In-Self-Test
(BIST) implementation. This method intends Test-Per-Scan (TPS) based test cases using …
(BIST) implementation. This method intends Test-Per-Scan (TPS) based test cases using …
Developments in scan shift power reduction: a survey
V Sontakke, J Dickhoff - Bulletin of Electrical Engineering and Informatics, 2023 - beei.org
While power reduction during testing is necessary for today's low-power devices, it also
lowers test costs. Scan-based methods are the most widely used approach for testing …
lowers test costs. Scan-based methods are the most widely used approach for testing …