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Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors
In accordance with a preferred embodiment of the present invention, a silicon-on-insulator
(SOI) chip includes a sili con layer of a predetermined thickness overlying an insu lator layer …
(SOI) chip includes a sili con layer of a predetermined thickness overlying an insu lator layer …
Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit
(57) ABSTRACT A semiconductor chip includes a semiconductor Substrate 126, in which
first and second active regions are disposed. A resistor 124 is formed in the first active …
first and second active regions are disposed. A resistor 124 is formed in the first active …
Strained channel complementary field-effect transistors
US PATENT DOCUMENTS formed from a first semiconductor material and the Source
4,069,094. A 1, 1978 Sh 1 and drain regions are formed from a second semiconductor 43 1 …
4,069,094. A 1, 1978 Sh 1 and drain regions are formed from a second semiconductor 43 1 …
Strained-channel transistor and methods of manufacture
Chenming Hu, Hsin-Chu (TW) 6,387,739 B1 5/2002 Smith, III 6,413.802 B1 7/2002 Hu et
al.(73) Assignee: Taiwan Semiconductor 6,414,355 B1 7/2002 An et al. Manufacturing …
al.(73) Assignee: Taiwan Semiconductor 6,414,355 B1 7/2002 An et al. Manufacturing …
Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors
In accordance with a preferred embodiment of the present invention, a silicon-on-insulator
(SOI) chip includes a sili con layer of a predetermined thickness overlying an insu lator layer …
(SOI) chip includes a sili con layer of a predetermined thickness overlying an insu lator layer …
Strained channel on insulator device
(57) ABSTRACT A Semiconductor device 10 includes a Substrate 12 (eg, a Silicon
Substrate) with an insulating layer 14 (eg, an oxide Such as Silicon dioxide) disposed …
Substrate) with an insulating layer 14 (eg, an oxide Such as Silicon dioxide) disposed …
Strained channel complementary field-effect transistors and methods of manufacture
(57) ABSTRACT A transistor includes a gate dielectric overlying a channel region. A source
region and a drain region are located on opposing sides of the channel region. The channel …
region and a drain region are located on opposing sides of the channel region. The channel …
Strained silicon structure
5'213'986 A 5/1993 Pinker et a1' relative to the? rst layer. The third epitaxial layer is formed
53747564 A 12/1994 Bruel' on the second layer, and the third layer has lattice mismatch 5 …
53747564 A 12/1994 Bruel' on the second layer, and the third layer has lattice mismatch 5 …
Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors
(57) ABSTRACT A static memory element includes a? rst inverter having an input coupled to
a left bit node and an output coupled to a right bit node. A second inverter has an input …
a left bit node and an output coupled to a right bit node. A second inverter has an input …
Capacitor with enhanced performance and method of manufacture
5,447,884 A 9/1995 Fahey et al_ A decoupling capacitor is formed in a semiconductor~ sub
5'461'250 A 10/1995 BurghartZ et a1_ strate that includes a strained srhcon layer. A …
5'461'250 A 10/1995 BurghartZ et a1_ strate that includes a strained srhcon layer. A …