Heracles: a tool for fast RTL-based design space exploration of multicore processors

MA Kinsy, M Pellauer, S Devadas - Proceedings of the ACM/SIGDA …, 2013 - dl.acm.org
This paper presents Heracles, an open-source, functional, parameterized, synthesizable
multicore system toolkit. Such a multi/many-core design platform is a powerful and versatile …

Region scheduling: efficiently using the cache architectures via page-level affinity

M Lee, K Schwan - ACM SIGPLAN Notices, 2012 - dl.acm.org
The performance of modern many-core platforms strongly depends on the effectiveness of
using their complex cache and memory structures. This indicates the need for a memory …

Memory coherence in the age of multicores

M Lis, KS Shim, MH Cho… - 2011 IEEE 29th …, 2011 - ieeexplore.ieee.org
As we enter an era of exascale multicores, the question of efficiently supporting a shared
memory model has become of paramount importance. On the one hand, programmers …

Therma: Thermal-aware run-time thread migration for nanophotonic interconnects

MV Beigi, G Memik - Proceedings of the 2016 International Symposium …, 2016 - dl.acm.org
In this paper, we introduce Therma, a thermal-aware run-time thread migration mechanism
for managing temperature fluctuations in nanophotonic networks. Nanophotonics is one of …

Hardware-level thread migration in a 110-core shared-memory multiprocessor

M Lis, KS Shim, B Cho, I Lebedev… - 2013 IEEE Hot Chips …, 2013 - ieeexplore.ieee.org
Advantages-significantly reduces traffic on high-locality workloads up to 14x reduction in
traffic in some benchmarks-simple to implement and verify (indep. of core count, no transient …

The execution migration machine: Directoryless shared-memory architecture

KS Shim, M Lis, O Khan, S Devadas - Computer, 2015 - ieeexplore.ieee.org
For certain applications involving chip multiprocessors with more than 16 cores, a
directoryless architecture with fine-grained and partial-context thread migration can …

Thread migration prediction for distributed shared caches

KS Shim, M Lis, O Khan… - IEEE Computer …, 2012 - ieeexplore.ieee.org
Chip-multiprocessors (CMPs) have become the mainstream parallel architecture in recent
years; for scalability reasons, designs with high core counts tend towards tiled CMPs with …

Directoryless shared memory coherence using execution migration

M Lis, KS Shim, MH Cho, O Khan, S Devadas - 2011 - dspace.mit.edu
We introduce the concept of deadlock-free migration-based coherent shared memory to the
NUCA family of architectures. Migration-based architectures move threads among cores to …

Fast and scalable thread migration for multi-core architectures

M Rodrigues, N Roma, P Tomás - 2015 IEEE 13th International …, 2015 - ieeexplore.ieee.org
Heterogeneous computing is a promising approach to tackle the thermal, power and energy
constraints posed by modern desktop and embedded computing systems. However, by also …

Design tradeoffs for simplicity and efficient verification in the Execution Migration Machine

KS Shim, M Lis, MH Cho, I Lebedev… - 2013 IEEE 31st …, 2013 - ieeexplore.ieee.org
As transistor technology continues to scale, the architecture community has experienced
exponential growth in design complexity and significantly increasing implementation and …