As existing silicon-based memory technologies are reaching their fundamental limit,
emerging memory alternatives, such as resistive random-access memories (RRAMs) …

We present a SPICE model for ferroelectric transistors (FEFETs) based on time-dependent
Landau-Khalatnikov equation solved self-consistently with the transistor equations. The …

This paper presents a one-sided Schmitt-trigger-based 9T static random access memory cell
with low energy consumption and high read stability, write ability, and hold stability yields in …

Modern scientific discovery is driven by an insatiable demand for computing performance.
The HPC community is targeting development of supercomputers able to sustain 1 ExaFlops …

The conventional six-transistor static random access memory (SRAM) cell allows high
density and fast differential sensing but suffers from half-select and read-disturb issues …

Microprocessor power consumption and dependability are both crucial challenges that
designers have to cope with due to shrinking feature sizes and increasing transistor counts …

Low voltage architecture and design are key enablers of high throughput per watt in
heterogeneous, accelerator-rich many-core designs. However, such low voltage operation …

This paper gives an overview of the Blackghost 1.0 system-on-chip (SoC) from Qualcomm
Research, which was our first test chip that paved the way toward the commercialization of …

This paper presents a half-select free 9T SRAM to facilitate reliable SRAM operation in the
near-threshold voltage region. In the proposed SRAM, the half-select disturbance, which …

Memory approximation techniques are commonly limited in scope, targeting individual
levels of the memory hierarchy. Existing approximation techniques for a full memory …