A 2-mW 70.7-dB SNDR 200-MS/s Pipelined-SAR ADC Using Continuous-Time SAR-Assisted Detect-and-Skip and Open-Then-Close Correlated Level Shifting
This work presents a 2-mW 70.7-dB SNDR 200-MS/s pipelined-successive-approximation-
register (SAR) analog-to-digital converter (ADC) with a continuous-time SAR-assisted detect …
register (SAR) analog-to-digital converter (ADC) with a continuous-time SAR-assisted detect …
[HTML][HTML] On the System-Level Design of Noise-Sha** SAR Analog-to-Digital Converters
AH Ismail - Electronics, 2024 - mdpi.com
In this work, the system-level design of noise-sha** (NS) successive-approximation (SAR)
analog-to-digital converters (ADCs) is investigated and analyzed. It is shown that despite the …
analog-to-digital converters (ADCs) is investigated and analyzed. It is shown that despite the …